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arm: dts: Import am335x-sancloud-bbe devicetree
This device tree is imported from Linux 5.13.1 and enabled via the am335x board file and the am335x evm defconfig. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
This commit is contained in:
Paul Barker
Lokesh Vutla
parent
942853dd96
commit
124b3030f5
4 changed files with 141 additions and 1 deletions
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@ -366,6 +366,7 @@ dtb-$(CONFIG_AM33XX) += \
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am335x-pocketbeagle.dtb \
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am335x-pxm50.dtb \
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am335x-rut.dtb \
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am335x-sancloud-bbe.dtb \
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am335x-shc.dtb \
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am335x-pdu001.dtb \
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am335x-chiliboard.dtb \
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137
arch/arm/dts/am335x-sancloud-bbe.dts
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137
arch/arm/dts/am335x-sancloud-bbe.dts
Normal file
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@ -0,0 +1,137 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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#include "am335x-bone-common.dtsi"
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#include "am335x-boneblack-common.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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model = "SanCloud BeagleBone Enhanced";
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compatible = "sancloud,am335x-boneenhanced", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txen.rgmii1_tctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
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AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
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>;
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};
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usb_hub_ctrl: usb_hub_ctrl {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7) /* rmii1_refclk.gpio0_29 */
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>;
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};
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mpu6050_pins: pinmux_mpu6050_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
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>;
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};
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lps3331ap_pins: pinmux_lps3331ap_pins {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT, MUX_MODE7) /* gpmc_a10.gpio1_26 */
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>;
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};
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};
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&mac {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&cpsw_default>;
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pinctrl-1 = <&cpsw_sleep>;
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status = "okay";
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};
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&davinci_mdio {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&davinci_mdio_default>;
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pinctrl-1 = <&davinci_mdio_sleep>;
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status = "okay";
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii-id";
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};
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&i2c0 {
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lps331ap: barometer@5c {
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compatible = "st,lps331ap-press";
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st,drdy-int-pin = <1>;
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reg = <0x5c>;
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interrupt-parent = <&gpio1>;
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interrupts = <26 IRQ_TYPE_EDGE_RISING>;
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};
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mpu6050: accelerometer@68 {
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compatible = "invensense,mpu6050";
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reg = <0x68>;
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interrupt-parent = <&gpio0>;
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interrupts = <2 IRQ_TYPE_EDGE_RISING>;
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orientation = <0xff 0 0 0 1 0 0 0 0xff>;
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};
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usb2512b: usb-hub@2c {
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compatible = "microchip,usb2512b";
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reg = <0x2c>;
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reset-gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
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/* wifi on port 4 */
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};
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};
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@ -954,6 +954,8 @@ int board_fit_config_name_match(const char *name)
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return 0;
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else if (board_is_icev2() && !strcmp(name, "am335x-icev2"))
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return 0;
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else if (board_is_bben() && !strcmp(name, "am335x-sancloud-bbe"))
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return 0;
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else
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return -1;
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}
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@ -37,7 +37,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=nand.0"
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CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.file-system)"
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
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CONFIG_OF_LIST="am335x-evm am335x-bone am335x-sancloud-bbe am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
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CONFIG_ENV_OVERWRITE=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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