GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-28 10:01:32 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

arm: mvebu: theadorable: Add board-specific PEX detection pulse width

Browse source 
Define a board-specific detection pulse-width array for the SerDes PCIe
interfaces. If not defined in the board code, the default of currently 2
is used. Values from 0...3 are possible (2 bits).

In this case of the theadorable board, PEX interface 0 needs a value
of 0 for the detection pulse width so that the PCIe device (Atheros
WLAN PCIe device) is consistantly detected.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Adam Shobash <adams@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Stefan Roese 2017-03-10 15:40:31 +01:00
parent 2399e40120
commit 1304f4bb8e
1 changed files with 7 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
board/theadorable/theadorable.c
View file

@ -115,6 +115,13 @@ MV_BIN_SERDES_CFG theadorable_serdes_cfg[] = {
}, },
}; };
/*
* Define a board-specific detection pulse-width array for the SerDes PCIe
* interfaces. If not defined in the board code, the default of currently 2
* is used. Values from 0...3 are possible (2 bits).
*/
u8 serdes_pex_pulse_width[4] = { 0, 2, 2, 2 };
MV_DRAM_MODES *ddr3_get_static_ddr_mode(void) MV_DRAM_MODES *ddr3_get_static_ddr_mode(void)
{ {
/* Only one mode supported for this board */ /* Only one mode supported for this board */