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net: sun8i_emac: Fix build for non-H3/H5 SoCs
Only the H3/H5 SoCs have an internal PHY and its related clock and reset controls. Use an #ifdef to guard the internal PHY control code block so it can be built for other SoCs, such as the A83T or A64. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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@ -604,6 +604,8 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
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{
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struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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#ifdef CONFIG_MACH_SUNXI_H3_H5
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/* Only H3/H5 have clock controls for internal EPHY */
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if (priv->use_internal_phy) {
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/* Set clock gating for ephy */
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setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
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@ -611,6 +613,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
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/* Deassert EPHY */
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setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
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}
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#endif
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/* Set clock gating for emac */
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setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
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