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arm64: zynqmp: Add QSPI flash mini u-boot configuration
Add configuration files/dtses for mini u-boot configuration which runs on smaller footprint of internal memory. This configuration has only required qspi flash support and it uses DCC as serial. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Siva Durga Prasad Paladugu
Michal Simek
parent
bb8920ed77
commit
14ed50a4bf
4 changed files with 162 additions and 0 deletions
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@ -152,6 +152,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
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zynqmp-mini-emmc0.dtb \
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zynqmp-mini-emmc1.dtb \
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zynqmp-mini-nand.dtb \
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zynqmp-mini-qspi.dtb \
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zynqmp-zcu100-revC.dtb \
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zynqmp-zcu102-revA.dtb \
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zynqmp-zcu102-revB.dtb \
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79
arch/arm/dts/zynqmp-mini-qspi.dts
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79
arch/arm/dts/zynqmp-mini-qspi.dts
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@ -0,0 +1,79 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* dts file for Xilinx ZynqMP Mini Configuration
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*
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* (C) Copyright 2015 - 2018, Xilinx, Inc.
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*
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* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
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* Michal Simek <michal.simek@xilinx.com>
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*/
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/dts-v1/;
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/ {
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model = "ZynqMP MINI QSPI";
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compatible = "xlnx,zynqmp";
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#address-cells = <2>;
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#size-cells = <1>;
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aliases {
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serial0 = &dcc;
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spi0 = &qspi;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@fffc0000 {
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device_type = "memory";
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reg = <0x0 0xfffc0000 0x40000>;
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};
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dcc: dcc {
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compatible = "arm,dcc";
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status = "disabled";
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u-boot,dm-pre-reloc;
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};
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amba: amba {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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qspi: spi@ff0f0000 {
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compatible = "xlnx,zynqmp-qspi-1.0";
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status = "disabled";
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clock-names = "ref_clk", "pclk";
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clocks = <&misc_clk &misc_clk>;
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num-cs = <1>;
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reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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};
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};
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};
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&qspi {
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status = "okay";
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flash@0 {
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compatible = "n25q512a11";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <10000000>;
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};
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};
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&dcc {
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status = "okay";
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};
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61
configs/xilinx_zynqmp_mini_qspi_defconfig
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61
configs/xilinx_zynqmp_mini_qspi_defconfig
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@ -0,0 +1,61 @@
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CONFIG_ARM=y
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CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_mini_qspi"
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CONFIG_ARCH_ZYNQMP=y
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CONFIG_SYS_TEXT_BASE=0xFFFC0000
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CONFIG_SYS_MEM_RSVD_FOR_MMU=y
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CONFIG_ZYNQMP_NO_DDR=y
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# CONFIG_CMD_ZYNQMP is not set
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CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi"
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# CONFIG_IMAGE_FORMAT_LEGACY is not set
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CONFIG_BOOTDELAY=-1
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_CMDLINE_EDITING is not set
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# CONFIG_AUTO_COMPLETE is not set
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# CONFIG_SYS_LONGHELP is not set
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CONFIG_SYS_PROMPT="ZynqMP> "
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# CONFIG_CMD_BDI is not set
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# CONFIG_CMD_CONSOLE is not set
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# CONFIG_CMD_BOOTD is not set
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# CONFIG_CMD_BOOTM is not set
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# CONFIG_CMD_BOOTI is not set
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# CONFIG_CMD_ELF is not set
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# CONFIG_CMD_FDT is not set
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# CONFIG_CMD_GO is not set
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# CONFIG_CMD_RUN is not set
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_XIMG is not set
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# CONFIG_CMD_EXPORTENV is not set
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# CONFIG_CMD_IMPORTENV is not set
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# CONFIG_CMD_EDITENV is not set
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# CONFIG_CMD_SAVEENV is not set
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# CONFIG_CMD_ENV_EXISTS is not set
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# CONFIG_CMD_CRC32 is not set
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# CONFIG_CMD_DM is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_LOADB is not set
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_SF=y
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# CONFIG_CMD_ECHO is not set
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# CONFIG_CMD_ITEST is not set
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# CONFIG_CMD_SOURCE is not set
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_CMD_MISC is not set
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CONFIG_MP=y
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# CONFIG_PARTITIONS is not set
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CONFIG_OF_EMBED=y
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# CONFIG_NET is not set
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# CONFIG_DM_WARN is not set
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# CONFIG_DM_DEVICE_REMOVE is not set
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# CONFIG_MMC is not set
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SF_DUAL_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_SPANSION=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_ZYNQMP_GQSPI=y
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# CONFIG_EFI_LOADER is not set
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21
include/configs/xilinx_zynqmp_mini_qspi.h
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21
include/configs/xilinx_zynqmp_mini_qspi.h
Normal file
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@ -0,0 +1,21 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuration for Xilinx ZynqMP QSPI Flash utility
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*
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* (C) Copyright 2018 Xilinx, Inc.
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* Michal Simek <michal.simek@xilinx.com>
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* Siva Durga Prasad Paladugu <sivadur@xilinx.com>
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*/
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#ifndef __CONFIG_ZYNQMP_MINI_QSPI_H
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#define __CONFIG_ZYNQMP_MINI_QSPI_H
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#include <configs/xilinx_zynqmp_mini.h>
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_ENV_SIZE 1400
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x20000)
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#define CONFIG_SYS_MALLOC_LEN 0x2000
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#endif /* __CONFIG_ZYNQMP_MINI_QSPI_H */
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