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vexpress64: Refactor header file to make it easier to add new FVPs
Rename from vexpress_aemv8a.h -> vepxress_aemv8.h as new FVPs may not be v8-A. No change in behavior. This is towards future work to enable support for the FVP_BaseR. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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3 changed files with 26 additions and 25 deletions
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@ -7,7 +7,7 @@ config SYS_VENDOR
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default "armltd"
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config SYS_CONFIG_NAME
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default "vexpress_aemv8a"
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default "vexpress_aemv8"
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config JUNO_DTB_PART
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string "NOR flash partition holding DTB"
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@ -25,7 +25,7 @@ or turning on CONFIG_BASE_FVP for the more full featured model.
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Rather than create a new armv8 board similar to armltd/vexpress64, add
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semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING
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and CONFIG_BASE_FVP both set. Also reuse the existing board config file
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vexpress_aemv8a.h but differentiate the two models by the presence or
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vexpress_aemv8.h but differentiate the two models by the presence or
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absence of CONFIG_BASE_FVP. This change is tested and works on both the
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Foundation and Base fastmodel simulators.
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@ -4,36 +4,37 @@
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* configurations.
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*/
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#ifndef __VEXPRESS_AEMV8A_H
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#define __VEXPRESS_AEMV8A_H
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#ifndef __VEXPRESS_AEMV8_H
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#define __VEXPRESS_AEMV8_H
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#define CONFIG_REMAKE_ELF
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/* Link Definitions */
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#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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#else
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/* ATF loads u-boot here for BASE_FVP model */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
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#elif CONFIG_TARGET_VEXPRESS64_JUNO
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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#endif
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
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/* CS register bases for the original memory map. */
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#define V2M_PA_CS0 0x00000000
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#define V2M_PA_CS1 0x14000000
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#define V2M_PA_CS2 0x18000000
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#define V2M_PA_CS3 0x1c000000
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#define V2M_PA_CS4 0x0c000000
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#define V2M_PA_CS5 0x10000000
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#define V2M_BASE 0x80000000
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#define V2M_PA_BASE 0x00000000
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#define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000)
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#define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000)
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#define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000)
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#define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000)
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#define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000)
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#define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000)
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#define V2M_PERIPH_OFFSET(x) (x << 16)
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#define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
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#define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
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#define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
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#define V2M_BASE 0x80000000
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/* Common peripherals relative to CS7. */
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#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
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#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
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@ -72,23 +73,23 @@
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/* Generic Interrupt Controller Definitions */
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#ifdef CONFIG_GICV3
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#define GICD_BASE (0x2f000000)
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#define GICR_BASE (0x2f100000)
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#define GICD_BASE (V2M_PA_BASE + 0x2f000000)
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#define GICR_BASE (V2M_PA_BASE + 0x2f100000)
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#else
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#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
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#define GICD_BASE (0x2f000000)
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#define GICC_BASE (0x2c000000)
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#elif CONFIG_TARGET_VEXPRESS64_JUNO
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define GICD_BASE (0x2C010000)
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#define GICC_BASE (0x2C02f000)
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#else
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#define GICD_BASE (V2M_PA_BASE + 0x2f000000)
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#define GICC_BASE (V2M_PA_BASE + 0x2c000000)
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#endif
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#endif /* !CONFIG_GICV3 */
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#ifndef CONFIG_TARGET_VEXPRESS64_JUNO
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/* The Vexpress64 simulators use SMSC91C111 */
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#define CONFIG_SMC91111 1
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#define CONFIG_SMC91111_BASE (0x01A000000)
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#define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000)
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#endif
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/* PL011 Serial Configuration */
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@ -113,7 +114,7 @@
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#ifdef CONFIG_TARGET_VEXPRESS64_JUNO
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#define PHYS_SDRAM_2 (0x880000000)
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#define PHYS_SDRAM_2_SIZE 0x180000000
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#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP && CONFIG_NR_DRAM_BANKS == 2
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#elif CONFIG_NR_DRAM_BANKS == 2
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#define PHYS_SDRAM_2 (0x880000000)
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#define PHYS_SDRAM_2_SIZE 0x80000000
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#endif
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@ -193,7 +194,7 @@
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/* Store environment at top of flash in the same location as blank.img */
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/* in the Juno firmware. */
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#else
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#define CONFIG_SYS_FLASH_BASE 0x0C000000
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#define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000)
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/* 256 x 256KiB sectors */
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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/* Store environment at top of flash */
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@ -210,4 +211,4 @@
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#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
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#define FLASH_MAX_SECTOR_SIZE 0x00040000
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#endif /* __VEXPRESS_AEMV8A_H */
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#endif /* __VEXPRESS_AEMV8_H */
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