mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-06-05 22:31:36 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-tegra
This commit is contained in:
commit
188f010905
15 changed files with 312 additions and 118 deletions
|
@ -1,5 +1,5 @@
|
||||||
/*
|
/*
|
||||||
* Copyright 2016 Toradex AG
|
* Copyright 2016-2019 Toradex AG
|
||||||
*
|
*
|
||||||
* This file is dual-licensed: you can use it either under the terms
|
* This file is dual-licensed: you can use it either under the terms
|
||||||
* of the GPL or the X11 license, at your option. Note that this dual
|
* of the GPL or the X11 license, at your option. Note that this dual
|
||||||
|
@ -230,19 +230,21 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Apalis GPIO */
|
/* Apalis GPIO */
|
||||||
ddc_scl_pv4 {
|
usb_vbus_en0_pn4 {
|
||||||
nvidia,pins = "ddc_scl_pv4";
|
nvidia,pins = "usb_vbus_en0_pn4";
|
||||||
nvidia,function = "rsvd2";
|
nvidia,function = "rsvd2";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||||
|
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
ddc_sda_pv5 {
|
usb_vbus_en1_pn5 {
|
||||||
nvidia,pins = "ddc_sda_pv5";
|
nvidia,pins = "usb_vbus_en1_pn5";
|
||||||
nvidia,function = "rsvd2";
|
nvidia,function = "rsvd2";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||||
|
nvidia,open-drain = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
pex_l0_rst_n_pdd1 {
|
pex_l0_rst_n_pdd1 {
|
||||||
nvidia,pins = "pex_l0_rst_n_pdd1";
|
nvidia,pins = "pex_l0_rst_n_pdd1";
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||||||
|
@ -333,24 +335,6 @@
|
||||||
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Apalis I2C2 (DDC) */
|
|
||||||
gen2_i2c_scl_pt5 {
|
|
||||||
nvidia,pins = "gen2_i2c_scl_pt5";
|
|
||||||
nvidia,function = "i2c2";
|
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
||||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
||||||
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
||||||
};
|
|
||||||
gen2_i2c_sda_pt6 {
|
|
||||||
nvidia,pins = "gen2_i2c_sda_pt6";
|
|
||||||
nvidia,function = "i2c2";
|
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
||||||
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
||||||
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
|
||||||
};
|
|
||||||
|
|
||||||
/* Apalis I2C3 (CAM) */
|
/* Apalis I2C3 (CAM) */
|
||||||
cam_i2c_scl_pbb1 {
|
cam_i2c_scl_pbb1 {
|
||||||
nvidia,pins = "cam_i2c_scl_pbb1";
|
nvidia,pins = "cam_i2c_scl_pbb1";
|
||||||
|
@ -369,6 +353,24 @@
|
||||||
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
nvidia,open-drain = <TEGRA_PIN_ENABLE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* Apalis I2C4 (DDC) */
|
||||||
|
ddc_scl_pv4 {
|
||||||
|
nvidia,pins = "ddc_scl_pv4";
|
||||||
|
nvidia,function = "i2c4";
|
||||||
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||||
|
nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
|
||||||
|
};
|
||||||
|
ddc_sda_pv5 {
|
||||||
|
nvidia,pins = "ddc_sda_pv5";
|
||||||
|
nvidia,function = "i2c4";
|
||||||
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
||||||
|
nvidia,rcv-sel = <TEGRA_PIN_DISABLE>;
|
||||||
|
};
|
||||||
|
|
||||||
/* Apalis MMC1 */
|
/* Apalis MMC1 */
|
||||||
sdmmc1_cd_n_pv3 { /* CD# GPIO */
|
sdmmc1_cd_n_pv3 { /* CD# GPIO */
|
||||||
nvidia,pins = "sdmmc1_wp_n_pv3";
|
nvidia,pins = "sdmmc1_wp_n_pv3";
|
||||||
|
@ -470,12 +472,12 @@
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
/* PWM3 active on pu6 being Apalis BKL1_PWM */
|
/* PWM3 active on pu6 being Apalis BKL1_PWM as well */
|
||||||
ph3 {
|
ph3 {
|
||||||
nvidia,pins = "ph3";
|
nvidia,pins = "ph3";
|
||||||
nvidia,function = "gmi";
|
nvidia,function = "pwm3";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -736,8 +738,8 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Apalis USBH_EN */
|
/* Apalis USBH_EN */
|
||||||
usb_vbus_en1_pn5 {
|
gen2_i2c_sda_pt6 {
|
||||||
nvidia,pins = "usb_vbus_en1_pn5";
|
nvidia,pins = "gen2_i2c_sda_pt6";
|
||||||
nvidia,function = "rsvd2";
|
nvidia,function = "rsvd2";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
|
@ -755,8 +757,8 @@
|
||||||
};
|
};
|
||||||
|
|
||||||
/* Apalis USBO1_EN */
|
/* Apalis USBO1_EN */
|
||||||
usb_vbus_en0_pn4 {
|
gen2_i2c_scl_pt5 {
|
||||||
nvidia,pins = "usb_vbus_en0_pn4";
|
nvidia,pins = "gen2_i2c_scl_pt5";
|
||||||
nvidia,function = "rsvd2";
|
nvidia,function = "rsvd2";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||||
|
@ -1501,10 +1503,14 @@
|
||||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
pv0 { /* NC */
|
/*
|
||||||
|
* PCB Version Indication: V1.2 and later have GPIO_PV0
|
||||||
|
* wired to GND, was NC before
|
||||||
|
*/
|
||||||
|
pv0 {
|
||||||
nvidia,pins = "pv0";
|
nvidia,pins = "pv0";
|
||||||
nvidia,function = "rsvd1";
|
nvidia,function = "rsvd1";
|
||||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
||||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||||
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
||||||
};
|
};
|
||||||
|
@ -1630,13 +1636,7 @@
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
/*
|
/* GEN2_I2C: unused */
|
||||||
* GEN2_I2C: I2C2_SDA/SCL (DDC) on MXM3 pin 205/207 (e.g. display EDID)
|
|
||||||
*/
|
|
||||||
hdmi_ddc: i2c@7000c400 {
|
|
||||||
status = "okay";
|
|
||||||
clock-frequency = <10000>;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
|
* CAM_I2C: I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor
|
||||||
|
@ -1647,7 +1647,14 @@
|
||||||
clock-frequency = <400000>;
|
clock-frequency = <400000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* I2C4 (DDC): unused */
|
/*
|
||||||
|
* I2C4 (DDC): I2C4_SDA/SCL (DDC) on MXM3 pin 205/207
|
||||||
|
* (e.g. display EDID)
|
||||||
|
*/
|
||||||
|
hdmi_ddc: i2c@7000c700 {
|
||||||
|
status = "okay";
|
||||||
|
clock-frequency = <10000>;
|
||||||
|
};
|
||||||
|
|
||||||
/* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
|
/* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */
|
||||||
i2c@7000d000 {
|
i2c@7000d000 {
|
||||||
|
@ -2112,7 +2119,7 @@
|
||||||
regulator-name = "VCC_USBO1";
|
regulator-name = "VCC_USBO1";
|
||||||
regulator-min-microvolt = <5000000>;
|
regulator-min-microvolt = <5000000>;
|
||||||
regulator-max-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
||||||
gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
|
gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
vin-supply = <®_5v0>;
|
vin-supply = <®_5v0>;
|
||||||
};
|
};
|
||||||
|
@ -2123,7 +2130,7 @@
|
||||||
regulator-name = "VCC_USBH(2A|2C|2D|3|4)";
|
regulator-name = "VCC_USBH(2A|2C|2D|3|4)";
|
||||||
regulator-min-microvolt = <5000000>;
|
regulator-min-microvolt = <5000000>;
|
||||||
regulator-max-microvolt = <5000000>;
|
regulator-max-microvolt = <5000000>;
|
||||||
gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
|
gpio = <&gpio TEGRA_GPIO(T, 6) GPIO_ACTIVE_HIGH>;
|
||||||
enable-active-high;
|
enable-active-high;
|
||||||
vin-supply = <®_5v0>;
|
vin-supply = <®_5v0>;
|
||||||
};
|
};
|
||||||
|
|
|
@ -6,24 +6,36 @@
|
||||||
|
|
||||||
#include <common.h>
|
#include <common.h>
|
||||||
#include <linux/ctype.h>
|
#include <linux/ctype.h>
|
||||||
|
#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30)
|
||||||
|
#include <asm/arch-tegra/pmc.h>
|
||||||
|
|
||||||
static void upstring(char *s)
|
static char *get_reset_cause(void)
|
||||||
{
|
{
|
||||||
while (*s) {
|
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||||
*s = toupper(*s);
|
|
||||||
s++;
|
switch (pmc->pmc_reset_status) {
|
||||||
|
case 0x00:
|
||||||
|
return "POR";
|
||||||
|
case 0x01:
|
||||||
|
return "WATCHDOG";
|
||||||
|
case 0x02:
|
||||||
|
return "SENSOR";
|
||||||
|
case 0x03:
|
||||||
|
return "SW_MAIN";
|
||||||
|
case 0x04:
|
||||||
|
return "LP0";
|
||||||
}
|
}
|
||||||
|
return "UNKNOWN";
|
||||||
}
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Print CPU information */
|
/* Print CPU information */
|
||||||
int print_cpuinfo(void)
|
int print_cpuinfo(void)
|
||||||
{
|
{
|
||||||
char soc_name[10];
|
printf("SoC: %s\n", CONFIG_SYS_SOC);
|
||||||
|
#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30)
|
||||||
strncpy(soc_name, CONFIG_SYS_SOC, 10);
|
printf("Reset cause: %s\n", get_reset_cause());
|
||||||
upstring(soc_name);
|
#endif
|
||||||
puts(soc_name);
|
|
||||||
puts("\n");
|
|
||||||
|
|
||||||
/* TBD: Add printf of major/minor rev info, stepping, etc. */
|
/* TBD: Add printf of major/minor rev info, stepping, etc. */
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -238,6 +238,45 @@ static bool is_partition_powered(u32 partid)
|
||||||
return !!(reg & (1 << partid));
|
return !!(reg & (1 << partid));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void unpower_partition(u32 partid)
|
||||||
|
{
|
||||||
|
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||||
|
|
||||||
|
debug("%s: part ID = %08X\n", __func__, partid);
|
||||||
|
/* Is the partition on? */
|
||||||
|
if (is_partition_powered(partid)) {
|
||||||
|
/* Yes, toggle the partition power state (ON -> OFF) */
|
||||||
|
debug("power_partition, toggling state\n");
|
||||||
|
writel(START_CP | partid, &pmc->pmc_pwrgate_toggle);
|
||||||
|
|
||||||
|
/* Wait for the power to come down */
|
||||||
|
while (is_partition_powered(partid))
|
||||||
|
;
|
||||||
|
|
||||||
|
/* Give I/O signals time to stabilize */
|
||||||
|
udelay(IO_STABILIZATION_DELAY);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void unpower_cpus(void)
|
||||||
|
{
|
||||||
|
debug("%s entry: G cluster\n", __func__);
|
||||||
|
|
||||||
|
/* Power down the fast cluster rail partition */
|
||||||
|
debug("%s: CRAIL\n", __func__);
|
||||||
|
unpower_partition(CRAIL);
|
||||||
|
|
||||||
|
/* Power down the fast cluster non-CPU partition */
|
||||||
|
debug("%s: C0NC\n", __func__);
|
||||||
|
unpower_partition(C0NC);
|
||||||
|
|
||||||
|
/* Power down the fast cluster CPU0 partition */
|
||||||
|
debug("%s: CE0\n", __func__);
|
||||||
|
unpower_partition(CE0);
|
||||||
|
|
||||||
|
debug("%s: done\n", __func__);
|
||||||
|
}
|
||||||
|
|
||||||
static void power_partition(u32 partid)
|
static void power_partition(u32 partid)
|
||||||
{
|
{
|
||||||
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
|
||||||
|
@ -284,6 +323,12 @@ void start_cpu(u32 reset_vector)
|
||||||
|
|
||||||
debug("%s entry, reset_vector = %x\n", __func__, reset_vector);
|
debug("%s entry, reset_vector = %x\n", __func__, reset_vector);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* High power clusters are on after software reset,
|
||||||
|
* it may interfere with tegra124_ram_repair.
|
||||||
|
* unpower them.
|
||||||
|
*/
|
||||||
|
unpower_cpus();
|
||||||
tegra124_init_clocks();
|
tegra124_init_clocks();
|
||||||
|
|
||||||
/* Set power-gating timer multiplier */
|
/* Set power-gating timer multiplier */
|
||||||
|
|
|
@ -10,6 +10,7 @@
|
||||||
#include <asm/io.h>
|
#include <asm/io.h>
|
||||||
#include <asm/arch/gpio.h>
|
#include <asm/arch/gpio.h>
|
||||||
#include <asm/arch/pinmux.h>
|
#include <asm/arch/pinmux.h>
|
||||||
|
#include <environment.h>
|
||||||
#include <pci_tegra.h>
|
#include <pci_tegra.h>
|
||||||
#include <power/as3722.h>
|
#include <power/as3722.h>
|
||||||
#include <power/pmic.h>
|
#include <power/pmic.h>
|
||||||
|
@ -19,11 +20,16 @@
|
||||||
|
|
||||||
#define LAN_DEV_OFF_N TEGRA_GPIO(O, 6)
|
#define LAN_DEV_OFF_N TEGRA_GPIO(O, 6)
|
||||||
#define LAN_RESET_N TEGRA_GPIO(S, 2)
|
#define LAN_RESET_N TEGRA_GPIO(S, 2)
|
||||||
|
#define FAN_EN TEGRA_GPIO(DD, 2)
|
||||||
#define LAN_WAKE_N TEGRA_GPIO(O, 5)
|
#define LAN_WAKE_N TEGRA_GPIO(O, 5)
|
||||||
#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
|
#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
|
||||||
#define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
|
#define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
|
||||||
#define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
|
#define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
|
||||||
#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
|
#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
|
||||||
|
#define VCC_USBH TEGRA_GPIO(T, 6)
|
||||||
|
#define VCC_USBH_V1_0 TEGRA_GPIO(N, 5)
|
||||||
|
#define VCC_USBO1 TEGRA_GPIO(T, 5)
|
||||||
|
#define VCC_USBO1_V1_0 TEGRA_GPIO(N, 4)
|
||||||
|
|
||||||
int arch_misc_init(void)
|
int arch_misc_init(void)
|
||||||
{
|
{
|
||||||
|
@ -31,6 +37,38 @@ int arch_misc_init(void)
|
||||||
NVBOOTTYPE_RECOVERY)
|
NVBOOTTYPE_RECOVERY)
|
||||||
printf("USB recovery mode\n");
|
printf("USB recovery mode\n");
|
||||||
|
|
||||||
|
/* PCB Version Indication: V1.2 and later have GPIO_PV0 wired to GND */
|
||||||
|
gpio_request(TEGRA_GPIO(V, 0), "PCB Version Indication");
|
||||||
|
gpio_direction_input(TEGRA_GPIO(V, 0));
|
||||||
|
if (gpio_get_value(TEGRA_GPIO(V, 0))) {
|
||||||
|
/*
|
||||||
|
* if using the default device tree for new V1.2 and later HW,
|
||||||
|
* use version for older V1.0 and V1.1 HW
|
||||||
|
*/
|
||||||
|
char *fdt_env = env_get("fdt_module");
|
||||||
|
|
||||||
|
if (fdt_env && !strcmp(FDT_MODULE, fdt_env)) {
|
||||||
|
env_set("fdt_module", FDT_MODULE_V1_0);
|
||||||
|
printf("patching fdt_module to " FDT_MODULE_V1_0
|
||||||
|
" for older V1.0 and V1.1 HW\n");
|
||||||
|
#ifndef CONFIG_ENV_IS_NOWHERE
|
||||||
|
env_save();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/* activate USB power enable GPIOs */
|
||||||
|
gpio_request(VCC_USBH_V1_0, "VCC_USBH");
|
||||||
|
gpio_direction_output(VCC_USBH_V1_0, 1);
|
||||||
|
gpio_request(VCC_USBO1_V1_0, "VCC_USBO1");
|
||||||
|
gpio_direction_output(VCC_USBO1_V1_0, 1);
|
||||||
|
} else {
|
||||||
|
/* activate USB power enable GPIOs */
|
||||||
|
gpio_request(VCC_USBH, "VCC_USBH");
|
||||||
|
gpio_direction_output(VCC_USBH, 1);
|
||||||
|
gpio_request(VCC_USBO1, "VCC_USBO1");
|
||||||
|
gpio_direction_output(VCC_USBO1, 1);
|
||||||
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -241,6 +279,15 @@ void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_PCI_TEGRA */
|
#endif /* CONFIG_PCI_TEGRA */
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable/start PWM CPU fan
|
||||||
|
*/
|
||||||
|
void start_cpu_fan(void)
|
||||||
|
{
|
||||||
|
gpio_request(FAN_EN, "FAN_EN");
|
||||||
|
gpio_direction_output(FAN_EN, 1);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Backlight off before OS handover
|
* Backlight off before OS handover
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -43,6 +43,29 @@ void pmic_enable_cpu_vdd(void)
|
||||||
udelay(10 * 1000);
|
udelay(10 * 1000);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Make sure all non-fused regulators are down.
|
||||||
|
* That way we're in known state after software reboot from linux
|
||||||
|
*/
|
||||||
|
tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
|
||||||
|
tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES);
|
||||||
|
udelay(10 * 1000);
|
||||||
|
tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
|
||||||
|
tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES);
|
||||||
|
udelay(10 * 1000);
|
||||||
|
tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
|
||||||
|
tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES);
|
||||||
|
udelay(10 * 1000);
|
||||||
|
tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
|
||||||
|
tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES);
|
||||||
|
udelay(10 * 1000);
|
||||||
|
tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
|
||||||
|
tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES);
|
||||||
|
udelay(10 * 1000);
|
||||||
|
tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
|
||||||
|
tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES);
|
||||||
|
udelay(10 * 1000);
|
||||||
|
|
||||||
debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__);
|
debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__);
|
||||||
/*
|
/*
|
||||||
* Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.
|
* Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.
|
||||||
|
|
|
@ -1,6 +1,6 @@
|
||||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2016, Toradex, Inc.
|
* Copyright (c) 2016-2019, Toradex, Inc.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef _PINMUX_CONFIG_APALIS_TK1_H_
|
#ifndef _PINMUX_CONFIG_APALIS_TK1_H_
|
||||||
|
@ -24,8 +24,6 @@ static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = {
|
||||||
GPIO_INIT(K, 2, IN),
|
GPIO_INIT(K, 2, IN),
|
||||||
GPIO_INIT(K, 7, IN),
|
GPIO_INIT(K, 7, IN),
|
||||||
GPIO_INIT(N, 2, OUT1),
|
GPIO_INIT(N, 2, OUT1),
|
||||||
GPIO_INIT(N, 4, OUT1),
|
|
||||||
GPIO_INIT(N, 5, OUT1),
|
|
||||||
GPIO_INIT(N, 7, IN),
|
GPIO_INIT(N, 7, IN),
|
||||||
GPIO_INIT(O, 5, IN),
|
GPIO_INIT(O, 5, IN),
|
||||||
GPIO_INIT(Q, 0, OUT0), /* Shift_CTRL_OE[0] */
|
GPIO_INIT(Q, 0, OUT0), /* Shift_CTRL_OE[0] */
|
||||||
|
@ -39,7 +37,8 @@ static const struct tegra_gpio_config apalis_tk1_gpio_inits[] = {
|
||||||
GPIO_INIT(R, 1, OUT0), /* Shift_CTRL_Dir_In[1] */
|
GPIO_INIT(R, 1, OUT0), /* Shift_CTRL_Dir_In[1] */
|
||||||
GPIO_INIT(R, 2, OUT0), /* Shift_CTRL_OE[3] */
|
GPIO_INIT(R, 2, OUT0), /* Shift_CTRL_OE[3] */
|
||||||
GPIO_INIT(S, 3, OUT0), /* Shift_CTRL_Dir_In[2] */
|
GPIO_INIT(S, 3, OUT0), /* Shift_CTRL_Dir_In[2] */
|
||||||
GPIO_INIT(U, 4, OUT1),
|
GPIO_INIT(U, 4, OUT0), /* RESET_MOCI_CTRL */
|
||||||
|
GPIO_INIT(V, 0, IN),
|
||||||
GPIO_INIT(W, 3, IN),
|
GPIO_INIT(W, 3, IN),
|
||||||
GPIO_INIT(W, 5, IN),
|
GPIO_INIT(W, 5, IN),
|
||||||
GPIO_INIT(BB, 0, IN),
|
GPIO_INIT(BB, 0, IN),
|
||||||
|
@ -130,8 +129,8 @@ static const struct pmux_pingrp_config apalis_tk1_pingrps[] = {
|
||||||
PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(DAP1_DIN_PN1, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(DAP1_DOUT_PN2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(DAP1_DOUT_PN2, SATA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(DAP1_SCLK_PN3, RSVD4, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(USB_VBUS_EN0_PN4, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
PINCFG(USB_VBUS_EN0_PN4, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||||
PINCFG(USB_VBUS_EN1_PN5, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
PINCFG(USB_VBUS_EN1_PN5, RSVD2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
||||||
PINCFG(HDMI_INT_PN7, RSVD1, DOWN, TRISTATE, INPUT, DEFAULT, NORMAL),
|
PINCFG(HDMI_INT_PN7, RSVD1, DOWN, TRISTATE, INPUT, DEFAULT, NORMAL),
|
||||||
PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(ULPI_DATA7_PO0, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(ULPI_DATA0_PO1, ULPI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
@ -175,8 +174,8 @@ static const struct pmux_pingrp_config apalis_tk1_pingrps[] = {
|
||||||
PINCFG(KB_ROW15_PS7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(KB_ROW15_PS7, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(KB_ROW16_PT0, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(KB_ROW17_PT1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(KB_ROW17_PT1, RSVD2, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
PINCFG(GEN2_I2C_SCL_PT5, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||||
PINCFG(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, ENABLE, DEFAULT),
|
PINCFG(GEN2_I2C_SDA_PT6, RSVD2, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
||||||
PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
PINCFG(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(PU0, UARTA, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(PU1, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
PINCFG(PU1, UARTA, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
||||||
|
@ -185,12 +184,12 @@ static const struct pmux_pingrp_config apalis_tk1_pingrps[] = {
|
||||||
PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(PU4, GMI, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(PU5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(PU5, GMI, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(PU6, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(PU6, PWM3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(PV0, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(PV0, RSVD1, UP, NORMAL, INPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(PV1, RSVD1, DOWN, TRISTATE, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(SDMMC3_CD_N_PV2, RSVD3, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
PINCFG(SDMMC3_CD_N_PV2, RSVD3, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(SDMMC1_WP_N_PV3, SDMMC1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
PINCFG(SDMMC1_WP_N_PV3, SDMMC1, UP, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(DDC_SCL_PV4, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
PINCFG(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
|
||||||
PINCFG(DDC_SDA_PV5, RSVD2, NORMAL, NORMAL, INPUT, DEFAULT, DEFAULT),
|
PINCFG(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, NORMAL),
|
||||||
PINCFG(GPIO_W2_AUD_PW2, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(GPIO_W2_AUD_PW2, SPI2, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(GPIO_W3_AUD_PW3, SPI6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
PINCFG(GPIO_W3_AUD_PW3, SPI6, NORMAL, TRISTATE, INPUT, DEFAULT, DEFAULT),
|
||||||
PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
PINCFG(DAP_MCLK1_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
|
||||||
|
|
|
@ -8,7 +8,7 @@ CONFIG_TARGET_APALIS_TK1=y
|
||||||
CONFIG_FIT=y
|
CONFIG_FIT=y
|
||||||
CONFIG_OF_SYSTEM_SETUP=y
|
CONFIG_OF_SYSTEM_SETUP=y
|
||||||
CONFIG_BOOTDELAY=1
|
CONFIG_BOOTDELAY=1
|
||||||
CONFIG_BOOTCOMMAND="run emmcboot; setenv fdtfile ${soc}-apalis-${fdt_board}.dtb && run distro_bootcmd"
|
CONFIG_BOOTCOMMAND="run emmcboot; setenv fdtfile ${soc}-${fdt-module}-${fdt_board}.dtb && run distro_bootcmd"
|
||||||
CONFIG_CONSOLE_MUX=y
|
CONFIG_CONSOLE_MUX=y
|
||||||
CONFIG_SYS_STDIO_DEREGISTER=y
|
CONFIG_SYS_STDIO_DEREGISTER=y
|
||||||
CONFIG_VERSION_VARIABLE=y
|
CONFIG_VERSION_VARIABLE=y
|
||||||
|
@ -17,7 +17,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||||
CONFIG_SPL_TEXT_BASE=0x80108000
|
CONFIG_SPL_TEXT_BASE=0x80108000
|
||||||
CONFIG_SYS_PROMPT="Apalis TK1 # "
|
CONFIG_SYS_PROMPT="Apalis TK1 # "
|
||||||
# CONFIG_CMD_IMI is not set
|
# CONFIG_CMD_IMI is not set
|
||||||
CONFIG_CMD_DFU=y
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
# CONFIG_CMD_FLASH is not set
|
||||||
CONFIG_CMD_GPIO=y
|
CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_I2C=y
|
CONFIG_CMD_I2C=y
|
||||||
|
@ -34,8 +33,6 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis"
|
||||||
CONFIG_IP_DEFRAG=y
|
CONFIG_IP_DEFRAG=y
|
||||||
CONFIG_TFTP_BLOCKSIZE=16352
|
CONFIG_TFTP_BLOCKSIZE=16352
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_DFU_MMC=y
|
|
||||||
CONFIG_DFU_RAM=y
|
|
||||||
CONFIG_SYS_I2C_TEGRA=y
|
CONFIG_SYS_I2C_TEGRA=y
|
||||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||||
CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y
|
CONFIG_TEGRA124_MMC_DISABLE_EXT_LOOPBACK=y
|
||||||
|
@ -56,7 +53,7 @@ CONFIG_USB_EHCI_TEGRA=y
|
||||||
CONFIG_USB_GADGET=y
|
CONFIG_USB_GADGET=y
|
||||||
CONFIG_USB_GADGET_MANUFACTURER="Toradex"
|
CONFIG_USB_GADGET_MANUFACTURER="Toradex"
|
||||||
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
|
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
|
||||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xffff
|
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
|
||||||
CONFIG_CI_UDC=y
|
CONFIG_CI_UDC=y
|
||||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||||
|
|
|
@ -14,7 +14,6 @@ CONFIG_ARCH_MISC_INIT=y
|
||||||
CONFIG_SPL_TEXT_BASE=0x80108000
|
CONFIG_SPL_TEXT_BASE=0x80108000
|
||||||
CONFIG_SYS_PROMPT="Apalis T30 # "
|
CONFIG_SYS_PROMPT="Apalis T30 # "
|
||||||
# CONFIG_CMD_IMI is not set
|
# CONFIG_CMD_IMI is not set
|
||||||
CONFIG_CMD_DFU=y
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
# CONFIG_CMD_FLASH is not set
|
||||||
CONFIG_CMD_GPIO=y
|
CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_I2C=y
|
CONFIG_CMD_I2C=y
|
||||||
|
@ -31,8 +30,6 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis"
|
||||||
CONFIG_IP_DEFRAG=y
|
CONFIG_IP_DEFRAG=y
|
||||||
CONFIG_TFTP_BLOCKSIZE=16352
|
CONFIG_TFTP_BLOCKSIZE=16352
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_DFU_MMC=y
|
|
||||||
CONFIG_DFU_RAM=y
|
|
||||||
CONFIG_SYS_I2C_TEGRA=y
|
CONFIG_SYS_I2C_TEGRA=y
|
||||||
CONFIG_E1000=y
|
CONFIG_E1000=y
|
||||||
CONFIG_PCI=y
|
CONFIG_PCI=y
|
||||||
|
|
|
@ -13,7 +13,6 @@ CONFIG_ARCH_MISC_INIT=y
|
||||||
CONFIG_SPL_TEXT_BASE=0x00108000
|
CONFIG_SPL_TEXT_BASE=0x00108000
|
||||||
CONFIG_SYS_PROMPT="Colibri T20 # "
|
CONFIG_SYS_PROMPT="Colibri T20 # "
|
||||||
# CONFIG_CMD_IMI is not set
|
# CONFIG_CMD_IMI is not set
|
||||||
CONFIG_CMD_DFU=y
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
# CONFIG_CMD_FLASH is not set
|
||||||
CONFIG_CMD_GPIO=y
|
CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_I2C=y
|
CONFIG_CMD_I2C=y
|
||||||
|
@ -39,8 +38,6 @@ CONFIG_ENV_IS_IN_NAND=y
|
||||||
CONFIG_IP_DEFRAG=y
|
CONFIG_IP_DEFRAG=y
|
||||||
CONFIG_TFTP_BLOCKSIZE=1536
|
CONFIG_TFTP_BLOCKSIZE=1536
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_DFU_MMC=y
|
|
||||||
CONFIG_DFU_RAM=y
|
|
||||||
CONFIG_SYS_I2C_TEGRA=y
|
CONFIG_SYS_I2C_TEGRA=y
|
||||||
CONFIG_MTD=y
|
CONFIG_MTD=y
|
||||||
CONFIG_MTD_UBI_FASTMAP=y
|
CONFIG_MTD_UBI_FASTMAP=y
|
||||||
|
|
|
@ -14,7 +14,6 @@ CONFIG_ARCH_MISC_INIT=y
|
||||||
CONFIG_SPL_TEXT_BASE=0x80108000
|
CONFIG_SPL_TEXT_BASE=0x80108000
|
||||||
CONFIG_SYS_PROMPT="Colibri T30 # "
|
CONFIG_SYS_PROMPT="Colibri T30 # "
|
||||||
# CONFIG_CMD_IMI is not set
|
# CONFIG_CMD_IMI is not set
|
||||||
CONFIG_CMD_DFU=y
|
|
||||||
# CONFIG_CMD_FLASH is not set
|
# CONFIG_CMD_FLASH is not set
|
||||||
CONFIG_CMD_GPIO=y
|
CONFIG_CMD_GPIO=y
|
||||||
CONFIG_CMD_I2C=y
|
CONFIG_CMD_I2C=y
|
||||||
|
@ -30,8 +29,6 @@ CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri"
|
||||||
CONFIG_IP_DEFRAG=y
|
CONFIG_IP_DEFRAG=y
|
||||||
CONFIG_TFTP_BLOCKSIZE=16352
|
CONFIG_TFTP_BLOCKSIZE=16352
|
||||||
CONFIG_SPL_DM=y
|
CONFIG_SPL_DM=y
|
||||||
CONFIG_DFU_MMC=y
|
|
||||||
CONFIG_DFU_RAM=y
|
|
||||||
CONFIG_SYS_I2C_TEGRA=y
|
CONFIG_SYS_I2C_TEGRA=y
|
||||||
CONFIG_SYS_NS16550=y
|
CONFIG_SYS_NS16550=y
|
||||||
CONFIG_USB=y
|
CONFIG_USB=y
|
||||||
|
|
|
@ -12,6 +12,7 @@ Required properties:
|
||||||
|
|
||||||
Optional properties
|
Optional properties
|
||||||
- intel,beep-nid: Node ID to use for beep (will be detected if not provided)
|
- intel,beep-nid: Node ID to use for beep (will be detected if not provided)
|
||||||
|
- codec-enable-gpio : The GPIO used to enable the audio codec
|
||||||
|
|
||||||
Required subnodes:
|
Required subnodes:
|
||||||
- codecs: Contains a list of codec nodes
|
- codecs: Contains a list of codec nodes
|
||||||
|
|
|
@ -0,0 +1,54 @@
|
||||||
|
NVIDIA Tegra audio complex, with MAX98090 CODEC
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : "nvidia,tegra-audio-max98090"
|
||||||
|
- clocks : Must contain an entry for each entry in clock-names.
|
||||||
|
See ../clocks/clock-bindings.txt for details.
|
||||||
|
- clock-names : Must include the following entries:
|
||||||
|
- pll_a
|
||||||
|
- pll_a_out0
|
||||||
|
- mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
|
||||||
|
- nvidia,model : The user-visible name of this sound complex.
|
||||||
|
- nvidia,audio-routing : A list of the connections between audio components.
|
||||||
|
Each entry is a pair of strings, the first being the connection's sink,
|
||||||
|
the second being the connection's source. Valid names for sources and
|
||||||
|
sinks are the MAX98090's pins (as documented in its binding), and the jacks
|
||||||
|
on the board:
|
||||||
|
|
||||||
|
* Headphones
|
||||||
|
* Speakers
|
||||||
|
* Mic Jack
|
||||||
|
* Int Mic
|
||||||
|
|
||||||
|
- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
|
||||||
|
connected to the CODEC.
|
||||||
|
- nvidia,audio-codec : The phandle of the MAX98090 audio codec.
|
||||||
|
|
||||||
|
Optional properties:
|
||||||
|
- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
|
||||||
|
- nvidia,mic-det-gpios : The GPIO that detect microphones are plugged in
|
||||||
|
- codec-enable-gpio : The GPIO used to enable the audio codec
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
sound {
|
||||||
|
compatible = "nvidia,tegra-audio-max98090-venice2",
|
||||||
|
"nvidia,tegra-audio-max98090";
|
||||||
|
nvidia,model = "NVIDIA Tegra Venice2";
|
||||||
|
|
||||||
|
nvidia,audio-routing =
|
||||||
|
"Headphones", "HPR",
|
||||||
|
"Headphones", "HPL",
|
||||||
|
"Speakers", "SPKR",
|
||||||
|
"Speakers", "SPKL",
|
||||||
|
"Mic Jack", "MICBIAS",
|
||||||
|
"IN34", "Mic Jack";
|
||||||
|
|
||||||
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||||
|
nvidia,audio-codec = <&acodec>;
|
||||||
|
|
||||||
|
clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
|
||||||
|
<&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
|
||||||
|
<&tegra_car TEGRA124_CLK_EXTERN1>;
|
||||||
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||||
|
};
|
32
doc/device-tree-bindings/sound/snow.txt
Normal file
32
doc/device-tree-bindings/sound/snow.txt
Normal file
|
@ -0,0 +1,32 @@
|
||||||
|
Audio Binding for Snow boards
|
||||||
|
|
||||||
|
Required properties:
|
||||||
|
- compatible : Can be one of the following,
|
||||||
|
"google,snow-audio-max98090" or
|
||||||
|
"google,snow-audio-max98091" or
|
||||||
|
"google,snow-audio-max98095"
|
||||||
|
- samsung,i2s-controller (deprecated): The phandle of the Samsung I2S controller
|
||||||
|
- samsung,audio-codec (deprecated): The phandle of the audio codec
|
||||||
|
|
||||||
|
Required sub-nodes:
|
||||||
|
|
||||||
|
- 'cpu' subnode with a 'sound-dai' property containing the phandle of the I2S
|
||||||
|
controller
|
||||||
|
- 'codec' subnode with a 'sound-dai' property containing list of phandles
|
||||||
|
to the CODEC nodes, first entry must be the phandle of the MAX98090,
|
||||||
|
MAX98091 or MAX98095 CODEC (exact device type is indicated by the compatible
|
||||||
|
string) and the second entry must be the phandle of the HDMI IP block node
|
||||||
|
|
||||||
|
Optional:
|
||||||
|
- samsung,model: The name of the sound-card
|
||||||
|
- codec-enable-gpio : The GPIO used to enable the audio codec
|
||||||
|
|
||||||
|
Example:
|
||||||
|
|
||||||
|
sound {
|
||||||
|
compatible = "google,snow-audio-max98095";
|
||||||
|
|
||||||
|
samsung,model = "Snow-I2S-MAX98095";
|
||||||
|
samsung,i2s-controller = <&i2s0>;
|
||||||
|
samsung,audio-codec = <&max98095>;
|
||||||
|
};
|
|
@ -592,6 +592,17 @@ config MMC_SDHCI_TEGRA
|
||||||
|
|
||||||
If unsure, say N.
|
If unsure, say N.
|
||||||
|
|
||||||
|
config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
|
||||||
|
bool "Disable external clock loopback"
|
||||||
|
depends on MMC_SDHCI_TEGRA && TEGRA124
|
||||||
|
help
|
||||||
|
Disable the external clock loopback and use the internal one on SDMMC3
|
||||||
|
as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
|
||||||
|
being set to 0xfffd according to the TRM.
|
||||||
|
|
||||||
|
TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
|
||||||
|
approach once proper kernel integration made it mainline.
|
||||||
|
|
||||||
config MMC_SDHCI_ZYNQ
|
config MMC_SDHCI_ZYNQ
|
||||||
bool "Arasan SDHCI controller support"
|
bool "Arasan SDHCI controller support"
|
||||||
depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
|
depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL
|
||||||
|
@ -671,17 +682,6 @@ config MMC_MTK
|
||||||
|
|
||||||
endif
|
endif
|
||||||
|
|
||||||
config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
|
|
||||||
bool "Disable external clock loopback"
|
|
||||||
depends on MMC_SDHCI_TEGRA && TEGRA124
|
|
||||||
help
|
|
||||||
Disable the external clock loopback and use the internal one on SDMMC3
|
|
||||||
as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits
|
|
||||||
being set to 0xfffd according to the TRM.
|
|
||||||
|
|
||||||
TODO(marcel.ziswiler@toradex.com): Move to device tree controlled
|
|
||||||
approach once proper kernel integration made it mainline.
|
|
||||||
|
|
||||||
config FSL_ESDHC
|
config FSL_ESDHC
|
||||||
bool "Freescale/NXP eSDHC controller support"
|
bool "Freescale/NXP eSDHC controller support"
|
||||||
help
|
help
|
||||||
|
|
|
@ -18,6 +18,9 @@
|
||||||
#define CONFIG_TEGRA_ENABLE_UARTA
|
#define CONFIG_TEGRA_ENABLE_UARTA
|
||||||
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
|
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
|
||||||
|
|
||||||
|
#define FDT_MODULE "apalis-v1.2"
|
||||||
|
#define FDT_MODULE_V1_0 "apalis"
|
||||||
|
|
||||||
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
|
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
|
||||||
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \
|
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \
|
||||||
CONFIG_TDX_CFG_BLOCK_OFFSET)
|
CONFIG_TDX_CFG_BLOCK_OFFSET)
|
||||||
|
@ -42,7 +45,7 @@
|
||||||
#define DFU_ALT_EMMC_INFO "apalis-tk1.img raw 0x0 0x500 mmcpart 1; " \
|
#define DFU_ALT_EMMC_INFO "apalis-tk1.img raw 0x0 0x500 mmcpart 1; " \
|
||||||
"boot part 0 1 mmcpart 0; " \
|
"boot part 0 1 mmcpart 0; " \
|
||||||
"rootfs part 0 2 mmcpart 0; " \
|
"rootfs part 0 2 mmcpart 0; " \
|
||||||
"uImage fat 0 1 mmcpart 0; " \
|
"zImage fat 0 1 mmcpart 0; " \
|
||||||
"tegra124-apalis-eval.dtb fat 0 1 mmcpart 0"
|
"tegra124-apalis-eval.dtb fat 0 1 mmcpart 0"
|
||||||
|
|
||||||
#define EMMC_BOOTCMD \
|
#define EMMC_BOOTCMD \
|
||||||
|
@ -54,11 +57,11 @@
|
||||||
"run emmcdtbload; " \
|
"run emmcdtbload; " \
|
||||||
"load mmc ${emmcdev}:${emmcbootpart} ${kernel_addr_r} " \
|
"load mmc ${emmcdev}:${emmcbootpart} ${kernel_addr_r} " \
|
||||||
"${boot_file} && run fdt_fixup && " \
|
"${boot_file} && run fdt_fixup && " \
|
||||||
"bootm ${kernel_addr_r} - ${dtbparam}\0" \
|
"bootz ${kernel_addr_r} - ${dtbparam}\0" \
|
||||||
"emmcbootpart=1\0" \
|
"emmcbootpart=1\0" \
|
||||||
"emmcdev=0\0" \
|
"emmcdev=0\0" \
|
||||||
"emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \
|
"emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \
|
||||||
"${fdt_addr_r} ${soc}-apalis-${fdt_board}.dtb && " \
|
"${fdt_addr_r} ${soc}-${fdt_module}-${fdt_board}.dtb && " \
|
||||||
"setenv dtbparam ${fdt_addr_r}\0" \
|
"setenv dtbparam ${fdt_addr_r}\0" \
|
||||||
"emmcfinduuid=part uuid mmc ${mmcdev}:${emmcrootpart} uuid\0" \
|
"emmcfinduuid=part uuid mmc ${mmcdev}:${emmcrootpart} uuid\0" \
|
||||||
"emmcrootpart=2\0"
|
"emmcrootpart=2\0"
|
||||||
|
@ -68,9 +71,9 @@
|
||||||
"nfsboot=pci enum; run setup; setenv bootargs ${defargs} ${nfsargs} " \
|
"nfsboot=pci enum; run setup; setenv bootargs ${defargs} ${nfsargs} " \
|
||||||
"${setupargs} ${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \
|
"${setupargs} ${vidargs}; echo Booting via DHCP/TFTP/NFS...; " \
|
||||||
"run nfsdtbload; dhcp ${kernel_addr_r} " \
|
"run nfsdtbload; dhcp ${kernel_addr_r} " \
|
||||||
"&& run fdt_fixup && bootm ${kernel_addr_r} - ${dtbparam}\0" \
|
"&& run fdt_fixup && bootz ${kernel_addr_r} - ${dtbparam}\0" \
|
||||||
"nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} " \
|
"nfsdtbload=setenv dtbparam; tftp ${fdt_addr_r} " \
|
||||||
"${soc}-apalis-${fdt_board}.dtb " \
|
"${soc}-${fdt_module}-${fdt_board}.dtb " \
|
||||||
"&& setenv dtbparam ${fdt_addr_r}\0"
|
"&& setenv dtbparam ${fdt_addr_r}\0"
|
||||||
|
|
||||||
#define SD_BOOTCMD \
|
#define SD_BOOTCMD \
|
||||||
|
@ -81,44 +84,28 @@
|
||||||
"${vidargs}; echo Booting from SD card in 8bit slot...; " \
|
"${vidargs}; echo Booting from SD card in 8bit slot...; " \
|
||||||
"run sddtbload; load mmc ${sddev}:${sdbootpart} " \
|
"run sddtbload; load mmc ${sddev}:${sdbootpart} " \
|
||||||
"${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
|
"${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
|
||||||
"bootm ${kernel_addr_r} - ${dtbparam}\0" \
|
"bootz ${kernel_addr_r} - ${dtbparam}\0" \
|
||||||
"sdbootpart=1\0" \
|
"sdbootpart=1\0" \
|
||||||
"sddev=1\0" \
|
"sddev=1\0" \
|
||||||
"sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \
|
"sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \
|
||||||
"${fdt_addr_r} ${soc}-apalis-${fdt_board}.dtb " \
|
"${fdt_addr_r} ${soc}-${fdt_module}-${fdt_board}.dtb " \
|
||||||
"&& setenv dtbparam ${fdt_addr_r}\0" \
|
"&& setenv dtbparam ${fdt_addr_r}\0" \
|
||||||
"sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \
|
"sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \
|
||||||
"sdrootpart=2\0"
|
"sdrootpart=2\0"
|
||||||
|
|
||||||
#define USB_BOOTCMD \
|
|
||||||
"set_usbargs=setenv usbargs ip=off root=PARTUUID=${uuid} ro " \
|
|
||||||
"rootfstype=ext4 rootwait\0" \
|
|
||||||
"usbboot=run setup; usb start; run usbfinduuid; run set_usbargs; " \
|
|
||||||
"setenv bootargs ${defargs} ${setupargs} " \
|
|
||||||
"${usbargs} ${vidargs}; echo Booting from USB stick...; " \
|
|
||||||
"run usbdtbload; load usb ${usbdev}:${usbbootpart} " \
|
|
||||||
"${kernel_addr_r} ${boot_file} && run fdt_fixup && " \
|
|
||||||
"bootm ${kernel_addr_r} - ${dtbparam}\0" \
|
|
||||||
"usbbootpart=1\0" \
|
|
||||||
"usbdev=0\0" \
|
|
||||||
"usbdtbload=setenv dtbparam; load usb ${usbdev}:${usbbootpart} " \
|
|
||||||
"${fdt_addr_r} ${soc}-apalis-${fdt_board}.dtb " \
|
|
||||||
"&& setenv dtbparam ${fdt_addr_r}\0" \
|
|
||||||
"usbfinduuid=part uuid usb ${usbdev}:${usbrootpart} uuid\0" \
|
|
||||||
"usbrootpart=2\0"
|
|
||||||
|
|
||||||
#define BOARD_EXTRA_ENV_SETTINGS \
|
#define BOARD_EXTRA_ENV_SETTINGS \
|
||||||
"boot_file=uImage\0" \
|
"boot_file=zImage\0" \
|
||||||
"console=ttyS0\0" \
|
"console=ttyS0\0" \
|
||||||
"defargs=lp0_vec=2064@0xf46ff000 core_edp_mv=1150 core_edp_ma=4000 " \
|
"defargs=lp0_vec=2064@0xf46ff000 core_edp_mv=1150 core_edp_ma=4000 " \
|
||||||
"usb_port_owner_info=2 lane_owner_info=6 emc_max_dvfs=0\0" \
|
"usb_port_owner_info=2 lane_owner_info=6 emc_max_dvfs=0 " \
|
||||||
|
"user_debug=30 pcie_aspm=off\0" \
|
||||||
"dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \
|
"dfu_alt_info=" DFU_ALT_EMMC_INFO "\0" \
|
||||||
EMMC_BOOTCMD \
|
EMMC_BOOTCMD \
|
||||||
"fdt_board=eval\0" \
|
"fdt_board=eval\0" \
|
||||||
"fdt_fixup=;\0" \
|
"fdt_fixup=;\0" \
|
||||||
|
"fdt_module=" FDT_MODULE "\0" \
|
||||||
NFS_BOOTCMD \
|
NFS_BOOTCMD \
|
||||||
SD_BOOTCMD \
|
SD_BOOTCMD \
|
||||||
USB_BOOTCMD \
|
|
||||||
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
|
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
|
||||||
"00:14:2d:00:00:00; fi; pci enum && tftpboot ${loadaddr} " \
|
"00:14:2d:00:00:00; fi; pci enum && tftpboot ${loadaddr} " \
|
||||||
"flash_eth.img && source ${loadaddr}\0" \
|
"flash_eth.img && source ${loadaddr}\0" \
|
||||||
|
@ -135,8 +122,7 @@
|
||||||
"setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
|
"setusbupdate=usb start && setenv interface usb; setenv drive 0; " \
|
||||||
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
|
"load ${interface} ${drive}:1 ${loadaddr} flash_blk.img && " \
|
||||||
"source ${loadaddr}\0" \
|
"source ${loadaddr}\0" \
|
||||||
USB_BOOTCMD \
|
"vidargs=fbcon=map:1\0"
|
||||||
"vidargs=video=tegrafb0:640x480-16@60 fbcon=map:1\0"
|
|
||||||
|
|
||||||
/* Increase console I/O buffer size */
|
/* Increase console I/O buffer size */
|
||||||
#undef CONFIG_SYS_CBSIZE
|
#undef CONFIG_SYS_CBSIZE
|
||||||
|
|
Loading…
Add table
Reference in a new issue