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mx51evk: support new relocation scheme
This patch is to fix build breakage and support new relocation
scheme for mx51evk.
- Correct IRAM base address and add size definition
The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than
0x1FFE8000 which is for older revision.
- Include imx-regs.h in mx51evk.h
Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be
referred to.
- Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE
They are used to define init RAM layout.
- Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been
buried by Wolfgang's commit below
25ddd1fb
: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
This commit is contained in:
parent
06982534b6
commit
1ab027cbf6
3 changed files with 15 additions and 6 deletions
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@ -26,7 +26,8 @@
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/*
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* IRAM
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*/
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#define IRAM_BASE_ADDR 0x1FFE8000 /* internal ram */
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#define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */
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#define IRAM_SIZE 0x00020000 /* 128 KB */
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/*
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* Graphics Memory of GPU
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*/
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@ -52,9 +52,9 @@ u32 get_board_rev(void)
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
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PHYS_SDRAM_1_SIZE);
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
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PHYS_SDRAM_1_SIZE);
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return 0;
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}
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@ -24,11 +24,11 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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/* High Level Configuration Options */
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#define CONFIG_MX51 /* in a mx51 */
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#define CONFIG_SKIP_RELOCATE_UBOOT
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#define CONFIG_SYS_MX5_HCLK 24000000
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#define CONFIG_SYS_MX5_CLK32 32768
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@ -51,7 +51,6 @@
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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/* size in bytes reserved for initial data */
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#define BOARD_LATE_INIT
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@ -200,6 +199,15 @@
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#define PHYS_SDRAM_1 CSD0_BASE_ADDR
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#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_DDR_CLKSEL 0
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#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
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