GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-15 19:51:37 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

board: synquacer: Initialize SCBM SMMU at board_init()

Browse source 
Since the SCBM SMMU is not only connected to the NETSEC
but also shared with the F_SDH30 (eMMC controller), that
should be initialized at board level instead of NETSEC.

Move the SMMU initialization code into board support
and call it from board_init().

Without this fix, if the NETSEC is disabled, the Linux
eMMC ADMA cause an error because SMMU is not initialized.

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
This commit is contained in:
Masami Hiramatsu 2021-07-12 19:35:44 +09:00 • committed by Tom Rini
parent edecc15eb9
commit 1ad3c8365a
2 changed files with 15 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

15
board/socionext/developerbox/developerbox.c
View file

@ -62,6 +62,19 @@ DECLARE_GLOBAL_DATA_PTR;
#define LOAD_OFFSET 0x100
/* SCBM System MMU is used for eMMC and NETSEC */
#define SCBM_SMMU_ADDR (0x52e00000UL)
#define SMMU_SCR0_OFFS (0x0)
#define SMMU_SCR0_SHCFG_INNER (0x2 << 22)
#define SMMU_SCR0_MTCFG (0x1 << 20)
#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16)
static void synquacer_setup_scbm_smmu(void)
{
writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB,
SCBM_SMMU_ADDR + SMMU_SCR0_OFFS);
}
/*
* Miscellaneous platform dependent initialisations
*/
@ -71,6 +84,8 @@ int board_init(void)
gd->env_addr = (ulong)&default_environment[0];
synquacer_setup_scbm_smmu();
return 0;
}

7
drivers/net/sni_netsec.c
View file

@ -1059,18 +1059,11 @@ static int netsec_of_to_plat(struct udevice *dev)
return 0;
}
#define SMMU_SCR0_SHCFG_INNER (0x2 << 22)
#define SMMU_SCR0_MTCFG (0x1 << 20)
#define SMMU_SCR0_MEMATTR_INNER_OUTER_WB (0xf << 16)
static int netsec_probe(struct udevice *dev)
{
struct netsec_priv *priv = dev_get_priv(dev);
int ret;
writel(SMMU_SCR0_SHCFG_INNER | SMMU_SCR0_MTCFG | SMMU_SCR0_MEMATTR_INNER_OUTER_WB,
(phys_addr_t)0x52E00000);
netsec_reset_hardware(priv, true);
ret = netsec_mdiobus_init(priv, dev->name);