mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 13:11:31 +00:00
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
This commit is contained in:
commit
1cb9cb3ec0
26 changed files with 419 additions and 79 deletions
|
@ -63,6 +63,11 @@ static struct mm_region zynqmp_mem_map[] = {
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|||
};
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struct mm_region *mem_map = zynqmp_mem_map;
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||||
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||||
u64 get_page_table_size(void)
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{
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return 0x14000;
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}
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||||
static unsigned int zynqmp_get_silicon_version_secure(void)
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{
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u32 ver;
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|
|
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@ -91,6 +91,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
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zynqmp-zcu102-revB.dtb \
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zynqmp-zc1751-xm015-dc1.dtb \
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zynqmp-zc1751-xm016-dc2.dtb \
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zynqmp-zc1751-xm018-dc4.dtb \
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zynqmp-zc1751-xm019-dc5.dtb
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dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb am335x-evm.dtb \
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am335x-evmsk.dtb \
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|
|
212
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
Normal file
212
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
Normal file
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@ -0,0 +1,212 @@
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|||
/*
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* dts file for Xilinx ZynqMP zc1751-xm018-dc4
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*
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* (C) Copyright 2015 - 2016, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
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*/
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/dts-v1/;
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#include "zynqmp.dtsi"
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#include "zynqmp-clk.dtsi"
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/ {
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model = "ZynqMP zc1751-xm018-dc4";
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compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
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aliases {
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can0 = &can0;
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can1 = &can1;
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ethernet0 = &gem0;
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ethernet1 = &gem1;
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ethernet2 = &gem2;
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ethernet3 = &gem3;
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gpio0 = &gpio;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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rtc0 = &rtc;
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serial0 = &uart0;
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serial1 = &uart1;
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spi0 = &qspi;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
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};
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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/* fpd_dma clk 667MHz, lpd_dma 500MHz */
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&fpd_dma_chan1 {
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status = "okay";
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xlnx,include-sg; /* for testing purpose */
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xlnx,overfetch; /* for testing purpose */
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xlnx,ratectrl = <0>; /* for testing purpose */
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xlnx,src-issue = <31>;
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};
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&fpd_dma_chan2 {
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status = "okay";
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xlnx,ratectrl = <100>; /* for testing purpose */
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xlnx,src-issue = <4>; /* for testing purpose */
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};
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&fpd_dma_chan3 {
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status = "okay";
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};
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&fpd_dma_chan4 {
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status = "okay";
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xlnx,include-sg; /* for testing purpose */
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};
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|
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&fpd_dma_chan5 {
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status = "okay";
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};
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&fpd_dma_chan6 {
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status = "okay";
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xlnx,include-sg; /* for testing purpose */
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};
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|
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&fpd_dma_chan7 {
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status = "okay";
|
||||
};
|
||||
|
||||
&fpd_dma_chan8 {
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||||
status = "okay";
|
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xlnx,include-sg; /* for testing purpose */
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||||
};
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||||
|
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&lpd_dma_chan1 {
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status = "okay";
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||||
};
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|
||||
&lpd_dma_chan2 {
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status = "okay";
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||||
};
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||||
|
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&lpd_dma_chan3 {
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status = "okay";
|
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};
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|
||||
&lpd_dma_chan4 {
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||||
status = "okay";
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||||
};
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||||
|
||||
&lpd_dma_chan5 {
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status = "okay";
|
||||
};
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||||
|
||||
&lpd_dma_chan6 {
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||||
status = "okay";
|
||||
};
|
||||
|
||||
&lpd_dma_chan7 {
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||||
status = "okay";
|
||||
};
|
||||
|
||||
&lpd_dma_chan8 {
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||||
status = "okay";
|
||||
};
|
||||
|
||||
&xlnx_dp {
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status = "okay";
|
||||
};
|
||||
|
||||
&xlnx_dpdma {
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status = "okay";
|
||||
};
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&gem0 {
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status = "okay";
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local-mac-address = [00 0a 35 00 02 90];
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy0>;
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ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
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reg = <0>;
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};
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ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
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reg = <7>;
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||||
};
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ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
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reg = <3>;
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||||
};
|
||||
ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
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reg = <8>;
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||||
};
|
||||
};
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|
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&gem1 {
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status = "okay";
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local-mac-address = [00 0a 35 00 02 91];
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy7>;
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};
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|
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&gem2 {
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status = "okay";
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local-mac-address = [00 0a 35 00 02 92];
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy3>;
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};
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&gem3 {
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status = "okay";
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local-mac-address = [00 0a 35 00 02 93];
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy8>;
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};
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|
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&gpio {
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status = "okay";
|
||||
};
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&gpu {
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status = "okay";
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||||
};
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|
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&i2c0 {
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clock-frequency = <400000>;
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status = "okay";
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||||
};
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||||
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&i2c1 {
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clock-frequency = <400000>;
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status = "okay";
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||||
};
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&rtc {
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status = "okay";
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||||
};
|
||||
|
||||
&uart0 {
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||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&watchdog0 {
|
||||
status = "okay";
|
||||
};
|
|
@ -50,7 +50,7 @@
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|||
#define NOP __asm__ __volatile__ ("nop");
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||||
|
||||
/* use machine status registe USE_MSR_REG */
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#if XILINX_USE_MSR_INSTR == 1
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1
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#define MSRSET(val) \
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__asm__ __volatile__ ("msrset r0," #val );
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||||
|
|
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@ -9,4 +9,28 @@ config SYS_VENDOR
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config SYS_CONFIG_NAME
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default "microblaze-generic"
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config XILINX_MICROBLAZE0_USE_MSR_INSTR
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int "USE_MSR_INSTR range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_PCMP_INSTR
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int "USE_PCMP_INSTR range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_BARREL
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int "USE_BARREL range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_DIV
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int "USE_DIV range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_HW_MUL
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int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
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default 0
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config XILINX_MICROBLAZE0_HW_VER
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string "Core version number"
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default 7.10.d
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endif
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|
|
|
@ -1,16 +1,20 @@
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#
|
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# (C) Copyright 2007 Michal Simek
|
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# (C) Copyright 2007 - 2016 Michal Simek
|
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#
|
||||
# Michal SIMEK <monstr@monstr.eu>
|
||||
# Michal SIMEK <monstr@monstr.eu>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
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#
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# CAUTION: This file is a faked configuration !!!
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# There is no real target for the microblaze-generic
|
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# configuration. You have to replace this file with
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# the generated file from your Xilinx design flow.
|
||||
#
|
||||
|
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PLATFORM_CPPFLAGS += -mno-xl-soft-mul
|
||||
PLATFORM_CPPFLAGS += -mno-xl-soft-div
|
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PLATFORM_CPPFLAGS += -mxl-barrel-shift
|
||||
CPU_VER := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER))
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||||
|
||||
# USE_HW_MUL can be 0, 1, or 2, defining a hierarchy of HW Mul support.
|
||||
CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high
|
||||
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul
|
||||
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div
|
||||
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift
|
||||
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare
|
||||
|
||||
CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))
|
||||
|
||||
PLATFORM_CPPFLAGS += $(CPUFLAGS-1) $(CPUFLAGS-2)
|
||||
|
|
|
@ -14,7 +14,6 @@
|
|||
#define XILINX_BOARD_NAME microblaze-generic
|
||||
|
||||
/* Microblaze is microblaze_0 */
|
||||
#define XILINX_USE_MSR_INSTR 1
|
||||
#define XILINX_FSL_NUMBER 3
|
||||
|
||||
/* GPIO is LEDs_4Bit*/
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
#include <sata.h>
|
||||
#include <ahci.h>
|
||||
#include <scsi.h>
|
||||
#include <malloc.h>
|
||||
#include <asm/arch/clk.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
|
@ -214,6 +215,13 @@ int board_late_init(void)
|
|||
{
|
||||
u32 reg = 0;
|
||||
u8 bootmode;
|
||||
const char *mode;
|
||||
char *new_targets;
|
||||
|
||||
if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
|
||||
debug("Saved variables - Skipping\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
reg = readl(&crlapb_base->boot_mode);
|
||||
bootmode = reg & BOOT_MODES_MASK;
|
||||
|
@ -222,37 +230,49 @@ int board_late_init(void)
|
|||
switch (bootmode) {
|
||||
case JTAG_MODE:
|
||||
puts("JTAG_MODE\n");
|
||||
setenv("modeboot", "jtagboot");
|
||||
mode = "pxe dhcp";
|
||||
break;
|
||||
case QSPI_MODE_24BIT:
|
||||
case QSPI_MODE_32BIT:
|
||||
setenv("modeboot", "qspiboot");
|
||||
mode = "qspi0";
|
||||
puts("QSPI_MODE\n");
|
||||
break;
|
||||
case EMMC_MODE:
|
||||
puts("EMMC_MODE\n");
|
||||
setenv("modeboot", "sdboot");
|
||||
mode = "mmc0";
|
||||
break;
|
||||
case SD_MODE:
|
||||
puts("SD_MODE\n");
|
||||
setenv("modeboot", "sdboot");
|
||||
mode = "mmc0";
|
||||
break;
|
||||
case SD_MODE1:
|
||||
puts("SD_MODE1\n");
|
||||
#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
|
||||
setenv("sdbootdev", "1");
|
||||
mode = "mmc1";
|
||||
#else
|
||||
mode = "mmc0";
|
||||
#endif
|
||||
setenv("modeboot", "sdboot");
|
||||
break;
|
||||
case NAND_MODE:
|
||||
puts("NAND_MODE\n");
|
||||
setenv("modeboot", "nandboot");
|
||||
mode = "nand0";
|
||||
break;
|
||||
default:
|
||||
mode = "";
|
||||
printf("Invalid Boot Mode:0x%x\n", bootmode);
|
||||
break;
|
||||
}
|
||||
|
||||
/*
|
||||
* One terminating char + one byte for space between mode
|
||||
* and default boot_targets
|
||||
*/
|
||||
new_targets = calloc(1, strlen(mode) +
|
||||
strlen(getenv("boot_targets")) + 2);
|
||||
|
||||
sprintf(new_targets, "%s %s", mode, getenv("boot_targets"));
|
||||
setenv("boot_targets", new_targets);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -123,6 +123,7 @@ void set_default_env(const char *s)
|
|||
error("Environment import failed: errno = %d\n", errno);
|
||||
|
||||
gd->flags |= GD_FLG_ENV_READY;
|
||||
gd->flags |= GD_FLG_ENV_DEFAULT;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -2,6 +2,10 @@ CONFIG_MICROBLAZE=y
|
|||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_TARGET_MICROBLAZE_GENERIC=y
|
||||
CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
|
||||
CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
|
||||
CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
|
||||
CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=1
|
||||
CONFIG_SYS_TEXT_BASE=0x29000000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic"
|
||||
CONFIG_SPL=y
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_ep"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x4000
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_ZYNQMP_USB=y
|
||||
|
@ -9,6 +9,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000
|
|||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_CONSOLE is not set
|
||||
|
@ -19,6 +20,7 @@ CONFIG_SYS_PROMPT="ZynqMP> "
|
|||
# CONFIG_CMD_LOADB is not set
|
||||
# CONFIG_CMD_LOADS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DFU=y
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_ZYNQMP_USB=y
|
||||
|
@ -8,6 +9,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000
|
|||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_ZYNQMP_USB=y
|
||||
|
@ -8,11 +9,13 @@ CONFIG_SYS_TEXT_BASE=0x8000000
|
|||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_NAND=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_DFU=y
|
||||
|
@ -40,6 +43,11 @@ CONFIG_SPI_FLASH_BAR=y
|
|||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_ZYNQ_GEM=y
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_ZYNQ=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff000000
|
||||
CONFIG_DEBUG_UART_CLOCK=100000000
|
||||
CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
|
|
43
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
Normal file
43
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
Normal file
|
@ -0,0 +1,43 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8000000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_TFTPPUT=y
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_TIMER=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_OF_EMBED=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_SYS_I2C_CADENCE=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_ZYNQ_SDHCI=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_ZYNQ_GEM=y
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_ZYNQ=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff000000
|
||||
CONFIG_DEBUG_UART_CLOCK=100000000
|
||||
CONFIG_DEBUG_UART_ANNOUNCE=y
|
|
@ -1,12 +1,14 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8000000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
|
|
|
@ -1,12 +1,14 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_ZYNQMP_USB=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8000000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
|
|
|
@ -1,12 +1,14 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102"
|
||||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_ZYNQMP_USB=y
|
||||
CONFIG_SYS_TEXT_BASE=0x8000000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB"
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_SYS_PROMPT="ZynqMP> "
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
|
|
|
@ -141,5 +141,6 @@ typedef struct global_data {
|
|||
#define GD_FLG_SPL_INIT 0x00400 /* spl_init() has been called */
|
||||
#define GD_FLG_SKIP_RELOC 0x00800 /* Don't relocate */
|
||||
#define GD_FLG_RECORD 0x01000 /* Record console */
|
||||
#define GD_FLG_ENV_DEFAULT 0x02000 /* Default variable flag */
|
||||
|
||||
#endif /* __ASM_GENERIC_GBL_DATA_H */
|
||||
|
|
|
@ -76,7 +76,6 @@
|
|||
#define CONFIG_BOOTP_GATEWAY
|
||||
#define CONFIG_BOOTP_HOSTNAME
|
||||
#define CONFIG_BOOTP_MAY_FAIL
|
||||
#define CONFIG_BOOTP_SERVERIP
|
||||
#define CONFIG_BOOTP_DNS
|
||||
#define CONFIG_BOOTP_PXE
|
||||
#define CONFIG_BOOTP_SUBNETMASK
|
||||
|
@ -105,7 +104,6 @@
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_NAND_ARASAN
|
||||
# define CONFIG_CMD_NAND
|
||||
# define CONFIG_CMD_NAND_LOCK_UNLOCK
|
||||
# define CONFIG_SYS_MAX_NAND_DEVICE 1
|
||||
# define CONFIG_SYS_NAND_SELF_INIT
|
||||
|
@ -148,21 +146,6 @@
|
|||
# define DFU_ALT_INFO
|
||||
#endif
|
||||
|
||||
/* Initial environment variables */
|
||||
#ifndef CONFIG_EXTRA_ENV_SETTINGS
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"kernel_addr=0x80000\0" \
|
||||
"fdt_addr=0x7000000\0" \
|
||||
"fdt_high=0x10000000\0" \
|
||||
CONFIG_KERNEL_FDT_OFST_SIZE \
|
||||
"sdbootdev=0\0"\
|
||||
"sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \
|
||||
"load mmc $sdbootdev:$partid $kernel_addr Image && " \
|
||||
"booti $kernel_addr - $fdt_addr\0" \
|
||||
DFU_ALT_INFO
|
||||
#endif
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "run $modeboot"
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
|
||||
#define CONFIG_BOARD_LATE_INIT
|
||||
|
@ -190,6 +173,8 @@
|
|||
# define CONFIG_PHY_NATSEMI
|
||||
# define CONFIG_PHY_TI
|
||||
# define CONFIG_PHY_GIGE
|
||||
# define CONFIG_PHY_VITESSE
|
||||
# define CONFIG_PHY_REALTEK
|
||||
# define PHY_ANEG_TIMEOUT 20000
|
||||
#endif
|
||||
|
||||
|
@ -210,7 +195,8 @@
|
|||
# define CONFIG_SYS_EEPROM_SIZE (64 * 1024)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_AHCI
|
||||
#ifdef CONFIG_SATA_CEVA
|
||||
#define CONFIG_AHCI
|
||||
#define CONFIG_LIBATA
|
||||
#define CONFIG_SCSI_AHCI
|
||||
#define CONFIG_SCSI_AHCI_PLAT
|
||||
|
@ -229,6 +215,50 @@
|
|||
#define CONFIG_BOARD_EARLY_INIT_R
|
||||
#define CONFIG_CLOCKS
|
||||
|
||||
#define ENV_MEM_LAYOUT_SETTINGS \
|
||||
"fdt_high=10000000\0" \
|
||||
"initrd_high=10000000\0" \
|
||||
"fdt_addr_r=0x40000000\0" \
|
||||
"pxefile_addr_r=0x10000000\0" \
|
||||
"kernel_addr_r=0x18000000\0" \
|
||||
"scriptaddr=0x02000000\0" \
|
||||
"ramdisk_addr_r=0x02100000\0" \
|
||||
|
||||
#if defined(CONFIG_ZYNQ_SDHCI)
|
||||
# define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
|
||||
#else
|
||||
# define BOOT_TARGET_DEVICES_MMC(func)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SATA_CEVA)
|
||||
# define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
|
||||
#else
|
||||
# define BOOT_TARGET_DEVICES_SCSI(func)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ZYNQMP_USB)
|
||||
# define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) func(USB, usb, 1)
|
||||
#else
|
||||
# define BOOT_TARGET_DEVICES_USB(func)
|
||||
#endif
|
||||
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
BOOT_TARGET_DEVICES_MMC(func) \
|
||||
BOOT_TARGET_DEVICES_USB(func) \
|
||||
BOOT_TARGET_DEVICES_SCSI(func) \
|
||||
func(PXE, pxe, na) \
|
||||
func(DHCP, dhcp, na)
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
/* Initial environment variables */
|
||||
#ifndef CONFIG_EXTRA_ENV_SETTINGS
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
ENV_MEM_LAYOUT_SETTINGS \
|
||||
BOOTENV \
|
||||
DFU_ALT_INFO
|
||||
#endif
|
||||
|
||||
#define CONFIG_SPL_TEXT_BASE 0xfffc0000
|
||||
#define CONFIG_SPL_MAX_SIZE 0x20000
|
||||
|
||||
|
|
|
@ -22,13 +22,6 @@
|
|||
|
||||
#define COUNTER_FREQUENCY 4000000
|
||||
|
||||
#define CONFIG_KERNEL_FDT_OFST_SIZE \
|
||||
"kernel_offset=0x400000\0" \
|
||||
"fdt_offset=0x2400000\0" \
|
||||
"kernel_size=0x2000000\0" \
|
||||
"fdt_size=0x80000\0" \
|
||||
"board=ep108\0"
|
||||
|
||||
#include <configs/xilinx_zynqmp.h>
|
||||
|
||||
#endif /* __CONFIG_ZYNQMP_EP_H */
|
||||
|
|
|
@ -17,13 +17,6 @@
|
|||
|
||||
#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1"
|
||||
|
||||
#define CONFIG_KERNEL_FDT_OFST_SIZE \
|
||||
"kernel_offset=0x400000\0" \
|
||||
"fdt_offset=0x2400000\0" \
|
||||
"kernel_size=0x2000000\0" \
|
||||
"fdt_size=0x80000\0" \
|
||||
"board=zc1751-dc1\0"
|
||||
|
||||
#include <configs/xilinx_zynqmp.h>
|
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
|
||||
|
|
|
@ -14,13 +14,6 @@
|
|||
|
||||
#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm016 dc2"
|
||||
|
||||
#define CONFIG_KERNEL_FDT_OFST_SIZE \
|
||||
"kernel_offset=0x400000\0" \
|
||||
"fdt_offset=0x2400000\0" \
|
||||
"kernel_size=0x2000000\0" \
|
||||
"fdt_size=0x80000\0" \
|
||||
"board=zc1751-dc2\0"
|
||||
|
||||
#include <configs/xilinx_zynqmp.h>
|
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */
|
||||
|
|
17
include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h
Normal file
17
include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h
Normal file
|
@ -0,0 +1,17 @@
|
|||
/*
|
||||
* Configuration for Xilinx ZynqMP zc1751 XM018 DC4
|
||||
*
|
||||
* (C) Copyright 2015 Xilinx, Inc.
|
||||
* Michal Simek <michal.simek@xilinx.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H
|
||||
#define __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H
|
||||
|
||||
#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm018 dc4"
|
||||
|
||||
#include <configs/xilinx_zynqmp.h>
|
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H */
|
|
@ -15,13 +15,6 @@
|
|||
|
||||
#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5"
|
||||
|
||||
#define CONFIG_KERNEL_FDT_OFST_SIZE \
|
||||
"kernel_offset=0x400000\0" \
|
||||
"fdt_offset=0x2400000\0" \
|
||||
"kernel_size=0x2000000\0" \
|
||||
"fdt_size=0x80000\0" \
|
||||
"board=zc1751-dc5\0"
|
||||
|
||||
#include <configs/xilinx_zynqmp.h>
|
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */
|
||||
|
|
|
@ -41,7 +41,6 @@
|
|||
#define CONFIG_CMD_PCA953X
|
||||
#define CONFIG_CMD_PCA953X_INFO
|
||||
|
||||
#define CONFIG_AHCI
|
||||
#define CONFIG_SATA_CEVA
|
||||
|
||||
#define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
|
||||
|
@ -54,13 +53,6 @@
|
|||
#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
|
||||
#define CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET 0x20
|
||||
|
||||
#define CONFIG_KERNEL_FDT_OFST_SIZE \
|
||||
"kernel_offset=0x180000\0" \
|
||||
"fdt_offset=0x100000\0" \
|
||||
"kernel_size=0x1e00000\0" \
|
||||
"fdt_size=0x80000\0" \
|
||||
"board=zcu102\0"
|
||||
|
||||
#include <configs/xilinx_zynqmp.h>
|
||||
|
||||
#endif /* __CONFIG_ZYNQMP_ZCU102_H */
|
||||
|
|
|
@ -158,11 +158,8 @@ ifeq ($(CONFIG_SYS_SOC),"at91")
|
|||
ALL-y += boot.bin
|
||||
endif
|
||||
|
||||
ifdef CONFIG_ARCH_ZYNQ
|
||||
ALL-y += $(obj)/boot.bin
|
||||
endif
|
||||
|
||||
ALL-(CONFIG_ARCH_ZYNQMP) += $(obj)/boot.bin
|
||||
ALL-$(CONFIG_ARCH_ZYNQ) += $(obj)/boot.bin
|
||||
ALL-$(CONFIG_ARCH_ZYNQMP) += $(obj)/boot.bin
|
||||
|
||||
all: $(ALL-y)
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue