mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 14:41:31 +00:00
* Patch by Jim Sandoz, 07 Nov 2002:
Increase number of network RX buffers (PKTBUFSRX in "include/net.h") for EEPRO100 based boards (especially SP8240) which showed "Receiver is not ready" errors when U-Boot was processing the receive buffers slower than the network controller was filling them. * Get rid of obsolete include/mpc74xx.h
This commit is contained in:
wdenk
parent
eb9401e3eb
commit
1d0350ed0b
19 changed files with 106 additions and 124 deletions
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@ -2,6 +2,13 @@
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Changes since for U-Boot 0.1.0:
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======================================================================
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* Patch by Jim Sandoz, 07 Nov 2002:
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Increase number of network RX buffers (PKTBUFSRX in
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"include/net.h") for EEPRO100 based boards (especially SP8240)
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which showed "Receiver is not ready" errors when U-Boot was
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processing the receive buffers slower than the network controller
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was filling them.
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* Patch by Andreas Oberritter, 09 Nov 2002:
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Change behaviour of NetLoop(): return -1 for errors, filesize
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otherwise; return code 0 is valid an means no file loaded - in this
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@ -1,5 +1,5 @@
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#include <config.h>
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#include <mpc74xx.h>
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#include <74xx_7xx.h>
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#include <version.h>
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#include <ppc_asm.tmpl>
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@ -29,6 +29,9 @@
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#include <mpc8260.h>
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#include <mpc8260_irq.h>
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#include <asm/processor.h>
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#ifdef CONFIG_STATUS_LED
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#include <status_led.h>
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#endif
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/****************************************************************************/
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@ -292,7 +295,7 @@ void timer_interrupt (struct pt_regs *regs)
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{
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#if defined(CONFIG_WATCHDOG) || defined(CFG_HYMOD_DBLEDS)
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volatile immap_t *immr = (immap_t *) CFG_IMMR;
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#endif /* CONFIG_WATCHDOG */
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#endif /* CONFIG_WATCHDOG */
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/* Restore Decrementer Count */
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set_dec (decrementer_count);
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@ -306,19 +309,19 @@ void timer_interrupt (struct pt_regs *regs)
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if ((timestamp % CFG_HZ) == 0) {
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#if defined(CFG_CMA_LCD_HEARTBEAT)
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extern void lcd_heartbeat (void);
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#endif /* CFG_CMA_LCD_HEARTBEAT */
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#endif /* CFG_CMA_LCD_HEARTBEAT */
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#if defined(CFG_HYMOD_DBLEDS)
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volatile iop8260_t *iop = &immr->im_ioport;
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static int shift = 0;
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#endif /* CFG_HYMOD_DBLEDS */
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#endif /* CFG_HYMOD_DBLEDS */
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#if defined(CFG_CMA_LCD_HEARTBEAT)
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lcd_heartbeat ();
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#endif /* CFG_CMA_LCD_HEARTBEAT */
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#endif /* CFG_CMA_LCD_HEARTBEAT */
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#if defined(CONFIG_WATCHDOG)
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reset_8260_watchdog (immr);
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#endif /* CONFIG_WATCHDOG */
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#endif /* CONFIG_WATCHDOG */
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#if defined(CFG_HYMOD_DBLEDS)
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/* hymod daughter board LEDs */
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@ -326,9 +329,13 @@ void timer_interrupt (struct pt_regs *regs)
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shift = 0;
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iop->iop_pdatd =
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(iop->iop_pdatd & ~0x0f000000) | (1 << (24 + shift));
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#endif /* CFG_HYMOD_DBLEDS */
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#endif /* CFG_HYMOD_DBLEDS */
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}
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#endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
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#endif /* CONFIG_WATCHDOG || CFG_CMA_LCD_HEARTBEAT */
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#ifdef CONFIG_STATUS_LED
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status_led_tick (timestamp);
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#endif /* CONFIG_STATUS_LED */
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}
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/****************************************************************************/
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@ -90,6 +90,7 @@ setdcr 6 # IBM 4XX DCR registers
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setenv 6
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smcinfo 3
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spiinfo 3
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sspi 4
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stack 5
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step 4
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tftpboot 4
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@ -76,6 +76,7 @@
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#define CFG_CMD_HWFLOW 0x0000020000000000 /* RTS/CTS hw flow control */
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#define CFG_CMD_SAVES 0x0000040000000000 /* save S record dump */
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#define CFG_CMD_VFD 0x0000080000000000 /* Display bitmap on VFD display*/
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#define CFG_CMD_SPI 0x0000100000000000 /* SPI utility */
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#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFF /* ALL commands */
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@ -110,7 +111,8 @@
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CFG_CMD_SCSI | \
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CFG_CMD_SDRAM | \
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CFG_CMD_USB | \
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CFG_CMD_VFD )
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CFG_CMD_VFD | \
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CFG_CMD_SPI )
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/* Default configuration
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*/
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@ -38,7 +38,7 @@
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<dout> - Hexadecimal string that gets sent\n" \
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),
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int do_spi (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]);
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int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
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#else
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#define CMD_TBL_SPI
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@ -310,7 +310,7 @@
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/*
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* L2CR setup -- make sure this is right for your board!
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* look in include/mpc74xx.h for the defines used here
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* look in include/74xx_7xx.h for the defines used here
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*/
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#define CFG_L2
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@ -400,7 +400,7 @@
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/*-----------------------------------------------------------------------
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* L2CR setup -- make sure this is right for your board!
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* look in include/mpc74xx.h for the defines used here
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* look in include/74xx_7xx.h for the defines used here
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*/
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#define CFG_L2
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@ -100,6 +100,7 @@
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& ~CFG_CMD_PCI \
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& ~CFG_CMD_PCMCIA \
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& ~CFG_CMD_SCSI \
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& ~CFG_CMD_SPI \
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& ~CFG_CMD_USB \
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& ~CFG_CMD_VFD )
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@ -120,6 +120,7 @@
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CFG_CMD_PCI | \
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CFG_CMD_PCMCIA | \
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CFG_CMD_SCSI | \
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CFG_CMD_SPI | \
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CFG_CMD_VFD | \
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CFG_CMD_USB ) )
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@ -344,7 +344,7 @@
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/*-----------------------------------------------------------------------
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* L2CR setup -- make sure this is right for your board!
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* look in include/mpc74xx.h for the defines used here
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* look in include/74xx_7xx.h for the defines used here
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*/
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#define CFG_L2
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@ -284,6 +284,7 @@
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~CFG_CMD_PCI & \
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~CFG_CMD_PCMCIA & \
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~CFG_CMD_SCSI & \
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~CFG_CMD_SPI & \
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~CFG_CMD_USB & \
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~CFG_CMD_VFD & \
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~CFG_CMD_DTT )
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@ -149,6 +149,7 @@
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CFG_CMD_PCI | \
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CFG_CMD_USB | \
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CFG_CMD_SCSI | \
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CFG_CMD_SPI | \
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CFG_CMD_VFD | \
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CFG_CMD_DTT ) )
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@ -252,10 +252,12 @@
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/*
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* select SPI support configuration
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* Select SPI support configuration
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*/
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#define CONFIG_SOFT_SPI /* enable SPI driver */
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#define CONFIG_SOFT_SPI /* Enable SPI driver */
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#define MAX_SPI_BYTES 4 /* Maximum number of bytes we can handle */
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#undef DEBUG_SPI /* Disable SPI debugging */
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/*
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* Software (bit-bang) SPI driver configuration
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*/
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@ -274,7 +276,7 @@
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else immr->im_ioport.iop_pdatd &= ~I2C_MOSI
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#define SPI_SCL(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \
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else immr->im_ioport.iop_pdatd &= ~I2C_SCLK
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#define SPI_DELAY /*udelay(1)*/ /* 1/2 SPI clock duration */
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#define SPI_DELAY /* No delay is needed */
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#endif /* CONFIG_SOFT_SPI */
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@ -485,6 +487,11 @@
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#define CFG_PROMPT_HUSH_PS2 "> "
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#endif
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/* When CONFIG_TIMESTAMP is selected, the timestamp (date and time)
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* of an image is printed by image commands like bootm or iminfo.
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*/
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#define CONFIG_TIMESTAMP
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/* What U-Boot subsytems do you want enabled? */
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#ifdef CONFIG_ETHER_ON_FCC
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# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
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@ -544,6 +551,7 @@
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#define CFG_LOAD_ADDR 0x400000 /* default load address */
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
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#define CFG_ALT_MEMTEST /* Select full-featured memory test */
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#define CFG_MEMTEST_START 0x2000 /* memtest works from the end of */
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/* the exception vector table */
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/* to the end of the DRAM */
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@ -294,9 +294,7 @@
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* is on the board edge side of both the LED strip and the DS0-DS7
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* switch.
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*/
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#if 0
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# define CONFIG_MISC_INIT_R
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#endif
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#undef CONFIG_MISC_INIT_R
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/* Set to a positive value to delay for running BOOTCOMMAND */
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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# define DEBUG_BOOTKEYS 0
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#endif
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/* Define this to contain any number of null terminated strings that
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* will be part of the default enviroment compiled into the boot image.
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"serverip=192.168.123.201\0" \
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"ipaddr=192.168.123.203\0" \
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"reprog="\
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"tftpboot 0x140000 /bdi2000/u-boot.bin; " \
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"protect off 1:0; " \
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"erase 1:0; " \
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"cp.b 140000 40000000 $(filesize); " \
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"protect on 1:0\0" \
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"zapenv="\
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"protect off 1:1; " \
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"erase 1:1; " \
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"protect on 1:1\0" \
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"root-on-initrd="\
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"setenv bootcmd "\
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"version;" \
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"echo;" \
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"bootp;" \
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"setenv bootargs root=/dev/ram0 rw " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \
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"run boot-hook;" \
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"bootm\0" \
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"root-on-nfs="\
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"setenv bootcmd "\
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"version;" \
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"echo;" \
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"bootp;" \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$(serverip):$(rootpath) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off\\;" \
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"run boot-hook;" \
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"bootm\0" \
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"boot-hook=echo boot-hook\0"
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/* Define a command string that is automatically executed when no character
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* is read on the console interface withing "Boot Delay" after reset.
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*/
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@ -352,6 +387,16 @@
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/* Monitor Command Prompt */
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#define CFG_PROMPT "=> "
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#undef CFG_HUSH_PARSER
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#ifdef CFG_HUSH_PARSER
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#define CFG_PROMPT_HUSH_PS2 "> "
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#endif
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/* When CONFIG_TIMESTAMP is selected, the timestamp (date and time)
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* of an image is printed by image commands like bootm or iminfo.
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*/
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#define CONFIG_TIMESTAMP
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/* What U-Boot subsytems do you want enabled? */
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#ifdef CONFIG_ETHER_ON_FCC
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# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
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@ -405,9 +450,10 @@
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_LOAD_ADDR 0x140000 /* default load address */
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#define CFG_LOAD_ADDR 0x400000 /* default load address */
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
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#define CFG_ALT_MEMTEST /* Select full-featured memory test */
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#define CFG_MEMTEST_START 0x2000 /* memtest works from the end of */
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/* the exception vector table */
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/* to the end of the DRAM */
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@ -39,7 +39,7 @@ void *ListGetPtrToItem(list_t list, int itemPosition);
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void ListRemoveItem(list_t list, void *itemDestination, int itemPosition);
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void ListRemoveItems(list_t list, void *itemsDestination, int firstItemPosition, int numItemsToRemove);
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#if 0
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#if 0 /* rarely ever used; kept here for reference just in case ... */
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void ListDisposePtrList(list_t list);
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void ListGetItem(list_t list, void *itemDestination, int itemPosition);
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void ListReplaceItem(list_t list, void *ptrToItem, int itemPosition);
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@ -72,6 +72,6 @@ int ListGetItemSize(list_t list);
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int GetIntListFromParmInfo(va_list parmInfo, int numIntegers, list_t *integerList);
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int ListInsertAfterItem(list_t list, void *ptrToItem, void *ptrToItemToInsertAfter, CompareFunction compareFunction);
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int ListInsertBeforeItem(list_t list, void *ptrToItem, void *ptrToItemToInsertBefore, CompareFunction compareFunction);
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#endif 0
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#endif /* 0 */
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#endif /* _LISTS_H_ */
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@ -1,98 +0,0 @@
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/*
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* (C) Copyright 2001
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* Josh Huber, Mission Critical Linux, Inc. <huber@mclx.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
|
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*
|
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* mpc74xx.h
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*
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* MPC74xx specific definitions
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*/
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#ifndef __MPC74XX_H__
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#define __MPC74XX_H__
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/*----------------------------------------------------------------
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* Exception offsets (PowerPC standard)
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*/
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#define EXC_OFF_SYS_RESET 0x0100 /* default system reset offset */
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/*----------------------------------------------------------------
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* l2cr values
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*/
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#define l2cr 1017
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#define L2CR_L2E 0x80000000 /* bit 0 - enable */
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#define L2CR_L2PE 0x40000000 /* bit 1 - data parity */
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#define L2CR_L2SIZ_2M 0x00000000 /* bits 2-3 - 2MB, MPC7400 only! */
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#define L2CR_L2SIZ_1M 0x30000000 /* ... 1MB */
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#define L2CR_L2SIZ_HM 0x20000000 /* ... 512K */
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#define L2CR_L2SIZ_QM 0x10000000 /* ... 256k */
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#define L2CR_L2CLK_1 0x02000000 /* bits 4-6 clock ratio div 1 */
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#define L2CR_L2CLK_1_5 0x04000000 /* bits 4-6 clock ratio div 1.5 */
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#define L2CR_L2CLK_2 0x08000000 /* bits 4-6 clock ratio div 2 */
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#define L2CR_L2CLK_2_5 0x0a000000 /* bits 4-6 clock ratio div 2.5 */
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#define L2CR_L2CLK_3 0x0c000000 /* bits 4-6 clock ratio div 3 */
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#define L2CR_L2CLK_3_5 0x06000000 /* bits 4-6 clock ratio div 3.5 */
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#define L2CR_L2CLK_4 0x0e000000 /* bits 4-6 clock ratio div 4 */
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#define L2CR_L2RAM_BURST 0x01000000 /* bits 7-8 - burst SRAM */
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#define L2CR_DO 0x00400000 /* bit 9 - enable caching of instr. in L2 */
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#define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */
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#define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */
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#define L2CR_L2WT 0x00080000 /* bit 12 - l2 write-through */
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#define L2CR_TS 0x00040000 /* bit 13 - test support on */
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#define L2CR_TS_OFF -L2CR_TS /* bit 13 - test support off */
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#define L2CR_L2OH_5 0x00000000 /* bits 14-15 - output hold time = short */
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#define L2CR_L2OH_1 0x00010000 /* bits 14-15 - output hold time = medium */
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#define L2CR_L2OH_INV 0x00020000 /* bits 14-15 - output hold time = long */
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#define L2CR_L2IP 0x00000001 /* global invalidate in progress */
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/*----------------------------------------------------------------
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* BAT settings. Look in config_<BOARD>.h for the actual setup
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||||
*/
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||||
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#define BATU_BL_128K 0x00000000
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#define BATU_BL_256K 0x00000004
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#define BATU_BL_512K 0x0000000c
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#define BATU_BL_1M 0x0000001c
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#define BATU_BL_2M 0x0000003c
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#define BATU_BL_4M 0x0000007c
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#define BATU_BL_8M 0x000000fc
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#define BATU_BL_16M 0x000001fc
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#define BATU_BL_32M 0x000003fc
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#define BATU_BL_64M 0x000007fc
|
||||
#define BATU_BL_128M 0x00000ffc
|
||||
#define BATU_BL_256M 0x00001ffc
|
||||
|
||||
#define BATU_VS 0x00000002
|
||||
#define BATU_VP 0x00000001
|
||||
#define BATU_INVALID 0x00000000
|
||||
|
||||
#define BATL_WRITETHROUGH 0x00000040 /* W */
|
||||
#define BATL_CACHEINHIBIT 0x00000020 /* I */
|
||||
#define BATL_COHERENT 0x00000010 /* M */
|
||||
#define BATL_GUARDED 0x00000008 /* G */
|
||||
|
||||
#define BATL_NO_ACCESS 0x00000000
|
||||
#define BATL_RO 0x00000001
|
||||
#define BATL_RW 0x00000002
|
||||
|
||||
#endif /* __MPC74XX_H__ */
|
||||
|
|
@ -27,7 +27,12 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_EEPRO100
|
||||
#define PKTBUFSRX 4
|
||||
#else
|
||||
#define PKTBUFSRX 8
|
||||
#endif
|
||||
|
||||
#define PKTALIGN 32
|
||||
|
||||
typedef ulong IPaddr_t;
|
||||
|
|
|
|||
|
|
@ -187,7 +187,7 @@ restart:
|
|||
switch (net_check_prereq (protocol)) {
|
||||
case 1:
|
||||
/* network not configured */
|
||||
return 0;
|
||||
return (-1);
|
||||
|
||||
#ifdef CONFIG_NET_MULTI
|
||||
case 2:
|
||||
|
|
@ -257,7 +257,7 @@ restart:
|
|||
if (ctrlc()) {
|
||||
eth_halt();
|
||||
printf("\nAbort\n");
|
||||
return 0;
|
||||
return (-1);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -295,7 +295,7 @@ restart:
|
|||
return NetBootFileXferSize;
|
||||
|
||||
case NETLOOP_FAIL:
|
||||
return 0;
|
||||
return (-1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue