mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 14:41:31 +00:00
mxs: Reowork SPL to use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This commit is contained in:
Otavio Salvador
Albert ARIBAUD
parent
9c471142bc
commit
1e0cf5c34b
10 changed files with 116 additions and 116 deletions
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@ -222,8 +222,8 @@ static const char *get_cpu_rev(void)
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int print_cpuinfo(void)
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{
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struct mx28_spl_data *data = (struct mx28_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
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struct mxs_spl_data *data = (struct mxs_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
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printf("CPU: Freescale i.MX%s rev%s at %d MHz\n",
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get_cpu_type(),
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@ -322,8 +322,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
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int mx28_dram_init(void)
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{
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struct mx28_spl_data *data = (struct mx28_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
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struct mxs_spl_data *data = (struct mxs_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
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if (data->mem_dram_size == 0) {
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printf("MX28:\n"
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@ -28,18 +28,18 @@
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void early_delay(int delay);
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void mx28_power_init(void);
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void mxs_power_init(void);
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#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
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void mx28_power_wait_pswitch(void);
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void mxs_power_wait_pswitch(void);
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#else
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static inline void mx28_power_wait_pswitch(void) { }
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static inline void mxs_power_wait_pswitch(void) { }
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#endif
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void mx28_mem_init(void);
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uint32_t mx28_mem_get_size(void);
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void mxs_mem_init(void);
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uint32_t mxs_mem_get_size(void);
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void mx28_lradc_init(void);
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void mx28_lradc_enable_batt_measurement(void);
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void mxs_lradc_init(void);
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void mxs_lradc_enable_batt_measurement(void);
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#endif /* __M28_INIT_H__ */
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@ -31,7 +31,7 @@
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include "mx28_init.h"
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#include "mxs_init.h"
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/*
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* This delay function is intended to be used only in early stage of boot, where
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@ -58,7 +58,7 @@ const iomux_cfg_t iomux_boot[] = {
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MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
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};
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uint8_t mx28_get_bootmode_index(void)
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uint8_t mxs_get_bootmode_index(void)
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{
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uint8_t bootmode = 0;
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int i;
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@ -92,22 +92,22 @@ uint8_t mx28_get_bootmode_index(void)
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return i;
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}
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void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
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void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
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const unsigned int iomux_size)
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{
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struct mx28_spl_data *data = (struct mx28_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
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uint8_t bootmode = mx28_get_bootmode_index();
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struct mxs_spl_data *data = (struct mxs_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
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uint8_t bootmode = mxs_get_bootmode_index();
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mxs_iomux_setup_multiple_pads(iomux_setup, iomux_size);
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mx28_power_init();
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mxs_power_init();
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mx28_mem_init();
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data->mem_dram_size = mx28_mem_get_size();
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mxs_mem_init();
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data->mem_dram_size = mxs_mem_get_size();
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data->boot_mode_idx = bootmode;
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mx28_power_wait_pswitch();
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mxs_power_wait_pswitch();
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}
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/* Support aparatus */
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@ -28,9 +28,9 @@
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include "mx28_init.h"
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#include "mxs_init.h"
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void mx28_lradc_init(void)
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void mxs_lradc_init(void)
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{
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struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
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@ -49,7 +49,7 @@ void mx28_lradc_init(void)
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LRADC_CTRL4_LRADC6SELECT_CHANNEL10);
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}
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void mx28_lradc_enable_batt_measurement(void)
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void mxs_lradc_enable_batt_measurement(void)
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{
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struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;
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@ -29,7 +29,7 @@
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/imx-regs.h>
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#include "mx28_init.h"
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#include "mxs_init.h"
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static uint32_t mx28_dram_vals[] = {
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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@ -82,23 +82,23 @@ static uint32_t mx28_dram_vals[] = {
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0x00000000, 0x00010001
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};
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void __mx28_adjust_memory_params(uint32_t *dram_vals)
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void __mxs_adjust_memory_params(uint32_t *dram_vals)
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{
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}
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void mx28_adjust_memory_params(uint32_t *dram_vals)
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__attribute__((weak, alias("__mx28_adjust_memory_params")));
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void mxs_adjust_memory_params(uint32_t *dram_vals)
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__attribute__((weak, alias("__mxs_adjust_memory_params")));
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void init_mx28_200mhz_ddr2(void)
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{
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int i;
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mx28_adjust_memory_params(mx28_dram_vals);
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mxs_adjust_memory_params(mx28_dram_vals);
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for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
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writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
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}
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void mx28_mem_init_clock(void)
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void mxs_mem_init_clock(void)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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@ -129,7 +129,7 @@ void mx28_mem_init_clock(void)
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early_delay(10000);
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}
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void mx28_mem_setup_cpu_and_hbus(void)
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void mxs_mem_setup_cpu_and_hbus(void)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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@ -161,7 +161,7 @@ void mx28_mem_setup_cpu_and_hbus(void)
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early_delay(15000);
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}
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void mx28_mem_setup_vdda(void)
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void mxs_mem_setup_vdda(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -172,7 +172,7 @@ void mx28_mem_setup_vdda(void)
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&power_regs->hw_power_vddactrl);
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}
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void mx28_mem_setup_vddd(void)
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void mxs_mem_setup_vddd(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -183,7 +183,7 @@ void mx28_mem_setup_vddd(void)
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&power_regs->hw_power_vdddctrl);
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}
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uint32_t mx28_mem_get_size(void)
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uint32_t mxs_mem_get_size(void)
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{
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uint32_t sz, da;
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uint32_t *vt = (uint32_t *)0x20;
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@ -202,7 +202,7 @@ uint32_t mx28_mem_get_size(void)
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return sz;
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}
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void mx28_mem_init(void)
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void mxs_mem_init(void)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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@ -219,9 +219,9 @@ void mx28_mem_init(void)
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early_delay(11000);
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mx28_mem_init_clock();
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mxs_mem_init_clock();
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mx28_mem_setup_vdda();
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mxs_mem_setup_vdda();
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/*
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* Configure the DRAM registers
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@ -242,9 +242,9 @@ void mx28_mem_init(void)
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while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
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;
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mx28_mem_setup_vddd();
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mxs_mem_setup_vddd();
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early_delay(10000);
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mx28_mem_setup_cpu_and_hbus();
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mxs_mem_setup_cpu_and_hbus();
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}
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@ -28,9 +28,9 @@
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include "mx28_init.h"
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#include "mxs_init.h"
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void mx28_power_clock2xtal(void)
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void mxs_power_clock2xtal(void)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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@ -40,7 +40,7 @@ void mx28_power_clock2xtal(void)
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&clkctrl_regs->hw_clkctrl_clkseq_set);
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}
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void mx28_power_clock2pll(void)
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void mxs_power_clock2pll(void)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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@ -52,7 +52,7 @@ void mx28_power_clock2pll(void)
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CLKCTRL_CLKSEQ_BYPASS_CPU);
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}
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void mx28_power_clear_auto_restart(void)
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void mxs_power_clear_auto_restart(void)
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{
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struct mxs_rtc_regs *rtc_regs =
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(struct mxs_rtc_regs *)MXS_RTC_BASE;
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@ -85,7 +85,7 @@ void mx28_power_clear_auto_restart(void)
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;
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}
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void mx28_power_set_linreg(void)
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void mxs_power_set_linreg(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -104,7 +104,7 @@ void mx28_power_set_linreg(void)
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POWER_VDDIOCTRL_LINREG_OFFSET_1STEPS_BELOW);
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}
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int mx28_get_batt_volt(void)
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int mxs_get_batt_volt(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -115,16 +115,16 @@ int mx28_get_batt_volt(void)
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return volt;
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}
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int mx28_is_batt_ready(void)
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int mxs_is_batt_ready(void)
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{
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return (mx28_get_batt_volt() >= 3600);
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return (mxs_get_batt_volt() >= 3600);
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}
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int mx28_is_batt_good(void)
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int mxs_is_batt_good(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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uint32_t volt = mx28_get_batt_volt();
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uint32_t volt = mxs_get_batt_volt();
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if ((volt >= 2400) && (volt <= 4300))
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return 1;
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@ -145,7 +145,7 @@ int mx28_is_batt_good(void)
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early_delay(500000);
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volt = mx28_get_batt_volt();
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volt = mxs_get_batt_volt();
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if (volt >= 3500)
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return 0;
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@ -160,7 +160,7 @@ int mx28_is_batt_good(void)
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return 0;
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}
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void mx28_power_setup_5v_detect(void)
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void mxs_power_setup_5v_detect(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -172,7 +172,7 @@ void mx28_power_setup_5v_detect(void)
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POWER_5VCTRL_PWRUP_VBUS_CMPS);
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}
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void mx28_src_power_init(void)
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void mxs_src_power_init(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -203,7 +203,7 @@ void mx28_src_power_init(void)
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clrbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_DCDC_XFER);
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}
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void mx28_power_init_4p2_params(void)
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void mxs_power_init_4p2_params(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -227,7 +227,7 @@ void mx28_power_init_4p2_params(void)
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0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
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}
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void mx28_enable_4p2_dcdc_input(int xfer)
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void mxs_enable_4p2_dcdc_input(int xfer)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -323,7 +323,7 @@ void mx28_enable_4p2_dcdc_input(int xfer)
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POWER_CTRL_ENIRQ_VDD5V_DROOP);
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}
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void mx28_power_init_4p2_regulator(void)
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void mxs_power_init_4p2_regulator(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -346,7 +346,7 @@ void mx28_power_init_4p2_regulator(void)
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* gradually to avoid large inrush current from the 5V cable which can
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* cause transients/problems
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*/
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mx28_enable_4p2_dcdc_input(0);
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mxs_enable_4p2_dcdc_input(0);
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if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
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/*
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@ -407,7 +407,7 @@ void mx28_power_init_4p2_regulator(void)
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writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr);
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}
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void mx28_power_init_dcdc_4p2_source(void)
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void mxs_power_init_dcdc_4p2_source(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -417,7 +417,7 @@ void mx28_power_init_dcdc_4p2_source(void)
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hang();
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}
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mx28_enable_4p2_dcdc_input(1);
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mxs_enable_4p2_dcdc_input(1);
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if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
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clrbits_le32(&power_regs->hw_power_dcdc4p2,
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@ -429,7 +429,7 @@ void mx28_power_init_dcdc_4p2_source(void)
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}
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}
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void mx28_power_enable_4p2(void)
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void mxs_power_enable_4p2(void)
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{
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struct mxs_power_regs *power_regs =
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(struct mxs_power_regs *)MXS_POWER_BASE;
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@ -451,11 +451,11 @@ void mx28_power_enable_4p2(void)
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setbits_le32(&power_regs->hw_power_vddioctrl,
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POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT);
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mx28_power_init_4p2_params();
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mx28_power_init_4p2_regulator();
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mxs_power_init_4p2_params();
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mxs_power_init_4p2_regulator();
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/* Shutdown battery (none present) */
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if (!mx28_is_batt_ready()) {
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if (!mxs_is_batt_ready()) {
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clrbits_le32(&power_regs->hw_power_dcdc4p2,
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POWER_DCDC4P2_BO_MASK);
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writel(POWER_CTRL_DCDC4P2_BO_IRQ,
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|
|
@ -464,7 +464,7 @@ void mx28_power_enable_4p2(void)
|
|||
&power_regs->hw_power_ctrl_clr);
|
||||
}
|
||||
|
||||
mx28_power_init_dcdc_4p2_source();
|
||||
mxs_power_init_dcdc_4p2_source();
|
||||
|
||||
writel(vdddctrl, &power_regs->hw_power_vdddctrl);
|
||||
early_delay(20);
|
||||
|
|
@ -488,7 +488,7 @@ void mx28_power_enable_4p2(void)
|
|||
&power_regs->hw_power_charge_clr);
|
||||
}
|
||||
|
||||
void mx28_boot_valid_5v(void)
|
||||
void mxs_boot_valid_5v(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -508,10 +508,10 @@ void mx28_boot_valid_5v(void)
|
|||
writel(POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_VDD5V_GT_VDDIO_IRQ,
|
||||
&power_regs->hw_power_ctrl_clr);
|
||||
|
||||
mx28_power_enable_4p2();
|
||||
mxs_power_enable_4p2();
|
||||
}
|
||||
|
||||
void mx28_powerdown(void)
|
||||
void mxs_powerdown(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -520,7 +520,7 @@ void mx28_powerdown(void)
|
|||
&power_regs->hw_power_reset);
|
||||
}
|
||||
|
||||
void mx28_batt_boot(void)
|
||||
void mxs_batt_boot(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -542,7 +542,7 @@ void mx28_batt_boot(void)
|
|||
clrsetbits_le32(&power_regs->hw_power_minpwr,
|
||||
POWER_MINPWR_HALFFETS, POWER_MINPWR_DOUBLE_FETS);
|
||||
|
||||
mx28_power_set_linreg();
|
||||
mxs_power_set_linreg();
|
||||
|
||||
clrbits_le32(&power_regs->hw_power_vdddctrl,
|
||||
POWER_VDDDCTRL_DISABLE_FET | POWER_VDDDCTRL_ENABLE_LINREG);
|
||||
|
|
@ -564,7 +564,7 @@ void mx28_batt_boot(void)
|
|||
0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
|
||||
}
|
||||
|
||||
void mx28_handle_5v_conflict(void)
|
||||
void mxs_handle_5v_conflict(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -577,26 +577,26 @@ void mx28_handle_5v_conflict(void)
|
|||
tmp = readl(&power_regs->hw_power_sts);
|
||||
|
||||
if (tmp & POWER_STS_VDDIO_BO) {
|
||||
mx28_powerdown();
|
||||
mxs_powerdown();
|
||||
break;
|
||||
}
|
||||
|
||||
if (tmp & POWER_STS_VDD5V_GT_VDDIO) {
|
||||
mx28_boot_valid_5v();
|
||||
mxs_boot_valid_5v();
|
||||
break;
|
||||
} else {
|
||||
mx28_powerdown();
|
||||
mxs_powerdown();
|
||||
break;
|
||||
}
|
||||
|
||||
if (tmp & POWER_STS_PSWITCH_MASK) {
|
||||
mx28_batt_boot();
|
||||
mxs_batt_boot();
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void mx28_5v_boot(void)
|
||||
void mxs_5v_boot(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -606,20 +606,20 @@ void mx28_5v_boot(void)
|
|||
* but their implementation always returns 1 so we omit it here.
|
||||
*/
|
||||
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
|
||||
mx28_boot_valid_5v();
|
||||
mxs_boot_valid_5v();
|
||||
return;
|
||||
}
|
||||
|
||||
early_delay(1000);
|
||||
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
|
||||
mx28_boot_valid_5v();
|
||||
mxs_boot_valid_5v();
|
||||
return;
|
||||
}
|
||||
|
||||
mx28_handle_5v_conflict();
|
||||
mxs_handle_5v_conflict();
|
||||
}
|
||||
|
||||
void mx28_init_batt_bo(void)
|
||||
void mxs_init_batt_bo(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -633,7 +633,7 @@ void mx28_init_batt_bo(void)
|
|||
writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
|
||||
}
|
||||
|
||||
void mx28_switch_vddd_to_dcdc_source(void)
|
||||
void mxs_switch_vddd_to_dcdc_source(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -647,7 +647,7 @@ void mx28_switch_vddd_to_dcdc_source(void)
|
|||
POWER_VDDDCTRL_DISABLE_STEPPING);
|
||||
}
|
||||
|
||||
void mx28_power_configure_power_source(void)
|
||||
void mxs_power_configure_power_source(void)
|
||||
{
|
||||
int batt_ready, batt_good;
|
||||
struct mxs_power_regs *power_regs =
|
||||
|
|
@ -655,15 +655,15 @@ void mx28_power_configure_power_source(void)
|
|||
struct mxs_lradc_regs *lradc_regs =
|
||||
(struct mxs_lradc_regs *)MXS_LRADC_BASE;
|
||||
|
||||
mx28_src_power_init();
|
||||
mxs_src_power_init();
|
||||
|
||||
batt_ready = mx28_is_batt_ready();
|
||||
batt_ready = mxs_is_batt_ready();
|
||||
|
||||
if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
|
||||
batt_good = mx28_is_batt_good();
|
||||
batt_good = mxs_is_batt_good();
|
||||
if (batt_ready) {
|
||||
/* 5V source detected, good battery detected. */
|
||||
mx28_batt_boot();
|
||||
mxs_batt_boot();
|
||||
} else {
|
||||
if (batt_good) {
|
||||
/* 5V source detected, low battery detceted. */
|
||||
|
|
@ -674,21 +674,21 @@ void mx28_power_configure_power_source(void)
|
|||
clrbits_le32(&power_regs->hw_power_battmonitor,
|
||||
POWER_BATTMONITOR_BATT_VAL_MASK);
|
||||
}
|
||||
mx28_5v_boot();
|
||||
mxs_5v_boot();
|
||||
}
|
||||
} else {
|
||||
/* 5V not detected, booting from battery. */
|
||||
mx28_batt_boot();
|
||||
mxs_batt_boot();
|
||||
}
|
||||
|
||||
mx28_power_clock2pll();
|
||||
mxs_power_clock2pll();
|
||||
|
||||
mx28_init_batt_bo();
|
||||
mxs_init_batt_bo();
|
||||
|
||||
mx28_switch_vddd_to_dcdc_source();
|
||||
mxs_switch_vddd_to_dcdc_source();
|
||||
}
|
||||
|
||||
void mx28_enable_output_rail_protection(void)
|
||||
void mxs_enable_output_rail_protection(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -706,7 +706,7 @@ void mx28_enable_output_rail_protection(void)
|
|||
POWER_VDDIOCTRL_PWDN_BRNOUT);
|
||||
}
|
||||
|
||||
int mx28_get_vddio_power_source_off(void)
|
||||
int mxs_get_vddio_power_source_off(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -734,7 +734,7 @@ int mx28_get_vddio_power_source_off(void)
|
|||
|
||||
}
|
||||
|
||||
int mx28_get_vddd_power_source_off(void)
|
||||
int mxs_get_vddd_power_source_off(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -765,7 +765,7 @@ int mx28_get_vddd_power_source_off(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
|
||||
void mxs_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -779,7 +779,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
|
|||
cur_target *= 50; /* 50 mV step*/
|
||||
cur_target += 2800; /* 2800 mV lowest */
|
||||
|
||||
powered_by_linreg = mx28_get_vddio_power_source_off();
|
||||
powered_by_linreg = mxs_get_vddio_power_source_off();
|
||||
if (new_target > cur_target) {
|
||||
|
||||
if (powered_by_linreg) {
|
||||
|
|
@ -862,7 +862,7 @@ void mx28_power_set_vddio(uint32_t new_target, uint32_t new_brownout)
|
|||
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
|
||||
}
|
||||
|
||||
void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
|
||||
void mxs_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
@ -876,7 +876,7 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
|
|||
cur_target *= 25; /* 25 mV step*/
|
||||
cur_target += 800; /* 800 mV lowest */
|
||||
|
||||
powered_by_linreg = mx28_get_vddd_power_source_off();
|
||||
powered_by_linreg = mxs_get_vddd_power_source_off();
|
||||
if (new_target > cur_target) {
|
||||
if (powered_by_linreg) {
|
||||
bo_int = readl(&power_regs->hw_power_vdddctrl);
|
||||
|
|
@ -959,31 +959,31 @@ void mx28_power_set_vddd(uint32_t new_target, uint32_t new_brownout)
|
|||
new_brownout << POWER_VDDDCTRL_BO_OFFSET_OFFSET);
|
||||
}
|
||||
|
||||
void mx28_setup_batt_detect(void)
|
||||
void mxs_setup_batt_detect(void)
|
||||
{
|
||||
mx28_lradc_init();
|
||||
mx28_lradc_enable_batt_measurement();
|
||||
mxs_lradc_init();
|
||||
mxs_lradc_enable_batt_measurement();
|
||||
early_delay(10);
|
||||
}
|
||||
|
||||
void mx28_power_init(void)
|
||||
void mxs_power_init(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
||||
mx28_power_clock2xtal();
|
||||
mx28_power_clear_auto_restart();
|
||||
mx28_power_set_linreg();
|
||||
mx28_power_setup_5v_detect();
|
||||
mxs_power_clock2xtal();
|
||||
mxs_power_clear_auto_restart();
|
||||
mxs_power_set_linreg();
|
||||
mxs_power_setup_5v_detect();
|
||||
|
||||
mx28_setup_batt_detect();
|
||||
mxs_setup_batt_detect();
|
||||
|
||||
mx28_power_configure_power_source();
|
||||
mx28_enable_output_rail_protection();
|
||||
mxs_power_configure_power_source();
|
||||
mxs_enable_output_rail_protection();
|
||||
|
||||
mx28_power_set_vddio(3300, 3150);
|
||||
mxs_power_set_vddio(3300, 3150);
|
||||
|
||||
mx28_power_set_vddd(1350, 1200);
|
||||
mxs_power_set_vddd(1350, 1200);
|
||||
|
||||
writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
|
||||
POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |
|
||||
|
|
@ -996,7 +996,7 @@ void mx28_power_init(void)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_SPL_MX28_PSWITCH_WAIT
|
||||
void mx28_power_wait_pswitch(void)
|
||||
void mxs_power_wait_pswitch(void)
|
||||
{
|
||||
struct mxs_power_regs *power_regs =
|
||||
(struct mxs_power_regs *)MXS_POWER_BASE;
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int));
|
|||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#include <asm/arch/iomux-mx28.h>
|
||||
void mx28_common_spl_init(const iomux_cfg_t *iomux_setup,
|
||||
void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
|
||||
const unsigned int iomux_size);
|
||||
#endif
|
||||
|
||||
|
|
@ -64,7 +64,7 @@ static const struct mx28_pair mx28_boot_modes[] = {
|
|||
{ 0x00, 0x00, "Reserved/Unknown/Wrong" },
|
||||
};
|
||||
|
||||
struct mx28_spl_data {
|
||||
struct mxs_spl_data {
|
||||
uint8_t boot_mode_idx;
|
||||
uint32_t mem_dram_size;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -145,13 +145,13 @@ const iomux_cfg_t iomux_setup[] = {
|
|||
|
||||
void board_init_ll(void)
|
||||
{
|
||||
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
|
||||
/* switch LED on */
|
||||
gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
|
||||
}
|
||||
|
||||
void mx28_adjust_memory_params(uint32_t *dram_vals)
|
||||
void mxs_adjust_memory_params(uint32_t *dram_vals)
|
||||
{
|
||||
/*
|
||||
* All address lines are routed from CPU to memory chip.
|
||||
|
|
|
|||
|
|
@ -218,5 +218,5 @@ const iomux_cfg_t iomux_setup[] = {
|
|||
|
||||
void board_init_ll(void)
|
||||
{
|
||||
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -180,5 +180,5 @@ void mx28_adjust_memory_params(uint32_t *dram_vals)
|
|||
|
||||
void board_init_ll(void)
|
||||
{
|
||||
mx28_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue