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rockchip: rk3288: move SOC setting into arch_cpu_init()
Qos setting and emmc relate SoC setting should go to arch_cpu_init(). Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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parent
a97b65a7a0
commit
1e7d2be011
2 changed files with 28 additions and 30 deletions
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@ -13,7 +13,6 @@
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#include <asm/arch-rockchip/cru_rk3288.h>
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#include <asm/arch-rockchip/periph.h>
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#include <asm/arch-rockchip/pmu_rk3288.h>
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#include <asm/arch-rockchip/qos_rk3288.h>
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#include <asm/arch-rockchip/boot_mode.h>
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#include <asm/gpio.h>
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#include <dt-bindings/clock/rk3288-cru.h>
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@ -26,24 +25,6 @@ __weak int rk_board_late_init(void)
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return 0;
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}
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int rk3288_qos_init(void)
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{
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int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
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/* set vop qos to higher priority */
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writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
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if (!fdt_node_check_compatible(gd->fdt_blob, 0,
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"rockchip,rk3288-tinker"))
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{
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/* set isp qos to higher priority */
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
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}
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return 0;
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}
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static void rk3288_detect_reset_reason(void)
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{
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struct rk3288_cru *cru = rockchip_get_cru();
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@ -84,7 +65,6 @@ static void rk3288_detect_reset_reason(void)
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int board_late_init(void)
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{
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setup_boot_mode();
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rk3288_qos_init();
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rk3288_detect_reset_reason();
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return rk_board_late_init();
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@ -266,8 +246,6 @@ U_BOOT_CMD(
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int board_early_init_f(void)
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{
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const uintptr_t GRF_SOC_CON0 = 0xff770244;
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const uintptr_t GRF_SOC_CON2 = 0xff77024c;
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struct udevice *dev;
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int ret;
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@ -282,13 +260,5 @@ int board_early_init_f(void)
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return ret;
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}
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rk_setreg(GRF_SOC_CON2, 1 << 0);
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/*
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* Disable JTAG on sdmmc0 IO. The SDMMC won't work until this bit is
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* cleared
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*/
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rk_clrreg(GRF_SOC_CON0, 1 << 12);
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return 0;
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}
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@ -2,12 +2,14 @@
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/*
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* Copyright (c) 2016 Rockchip Electronics Co., Ltd
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*/
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#include <common.h>
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#include <asm/armv7.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/bootrom.h>
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#include <asm/arch-rockchip/hardware.h>
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#include <asm/arch-rockchip/grf_rk3288.h>
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#include <asm/arch-rockchip/pmu_rk3288.h>
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#include <asm/arch-rockchip/qos_rk3288.h>
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#include <asm/arch-rockchip/sdram_common.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -40,6 +42,24 @@ static void configure_l2ctlr(void)
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}
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#endif
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int rk3288_qos_init(void)
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{
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int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT;
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/* set vop qos to higher priority */
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writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS);
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS);
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if (!fdt_node_check_compatible(gd->fdt_blob, 0,
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"rockchip,rk3288-tinker")) {
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/* set isp qos to higher priority */
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS);
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS);
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writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS);
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}
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return 0;
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}
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int arch_cpu_init(void)
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{
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#ifdef CONFIG_SPL_BUILD
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@ -50,6 +70,14 @@ int arch_cpu_init(void)
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/* Use rkpwm by default */
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rk_setreg(&grf->soc_con2, 1 << 0);
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/*
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* Disable JTAG on sdmmc0 IO. The SDMMC won't work until this bit is
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* cleared
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*/
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rk_clrreg(&grf->soc_con0, 1 << 12);
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rk3288_qos_init();
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#endif
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return 0;
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