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usb:ehci-mx6 add phy mode query function

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usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'.

Include a new board weak function board_usb_phy_mode. If board code
does not reimplement this function, it just call usb_phy_mode and return
usb_phy_mode's return value. The reason to include such a weak function
is: " SOC OTG core <--connect--> board HOST port, but no pin id for
the board host port, so board can not use usb_phy_mode to return the
phy mode, but define it's own rule."

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
This commit is contained in:
Peng Fan 2014-11-10 08:50:39 +08:00 • committed by Marek Vasut
parent 0d485b9095
commit 229dbba9b1
2 changed files with 27 additions and 2 deletions
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27
drivers/usb/host/ehci-mx6.c
View file

@ -160,7 +160,7 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3); val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
__raw_writel(val, phy_ctrl); __raw_writel(val, phy_ctrl);
return val & USBPHY_CTRL_OTG_ID; return 0;
} }
/* Base address for this IP block is 0x02184800 */ /* Base address for this IP block is 0x02184800 */
@ -193,6 +193,28 @@ static void usb_oc_config(int index)
__raw_writel(val, ctrl); __raw_writel(val, ctrl);
} }
int usb_phy_mode(int port)
{
void __iomem *phy_reg;
void __iomem *phy_ctrl;
u32 val;
phy_reg = (void __iomem *)phy_bases[port];
phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
val = __raw_readl(phy_ctrl);
if (val & USBPHY_CTRL_OTG_ID)
return USB_INIT_DEVICE;
else
return USB_INIT_HOST;
}
int __weak board_usb_phy_mode(int port)
{
return usb_phy_mode(port);
}
int __weak board_ehci_hcd_init(int port) int __weak board_ehci_hcd_init(int port)
{ {
return 0; return 0;
@ -221,7 +243,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
usb_power_config(index); usb_power_config(index);
usb_oc_config(index); usb_oc_config(index);
usb_internal_phy_clock_gate(index, 1); usb_internal_phy_clock_gate(index, 1);
type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST; usb_phy_enable(index, ehci);
type = board_usb_phy_mode(index);
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); *hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr + *hcor = (struct ehci_hcor *)((uint32_t)*hccr +

2
include/usb/ehci-fsl.h
View file

@ -277,7 +277,9 @@ struct usb_ehci {
#define MXC_EHCI_IPPUE_DOWN (1 << 10) #define MXC_EHCI_IPPUE_DOWN (1 << 10)
#define MXC_EHCI_IPPUE_UP (1 << 11) #define MXC_EHCI_IPPUE_UP (1 << 11)
int usb_phy_mode(int port);
/* Board-specific initialization */ /* Board-specific initialization */
int board_ehci_hcd_init(int port); int board_ehci_hcd_init(int port);
int board_usb_phy_mode(int port);
#endif /* _EHCI_FSL_H */ #endif /* _EHCI_FSL_H */