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net: fec: do not access reserved register for i.MX8M
The MIB RAM and FIFO receive start register does not exist on i.MX8M. Accessing these register will cause system hang. Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
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1 changed files with 2 additions and 2 deletions
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@ -562,8 +562,8 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
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writel(0x00000000, &fec->eth->gaddr1);
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writel(0x00000000, &fec->eth->gaddr1);
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writel(0x00000000, &fec->eth->gaddr2);
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writel(0x00000000, &fec->eth->gaddr2);
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/* Do not access reserved register for i.MX6UL */
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/* Do not access reserved register */
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if (!is_mx6ul() && !is_mx6ull()) {
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if (!is_mx6ul() && !is_mx6ull() && !is_mx8m()) {
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/* clear MIB RAM */
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/* clear MIB RAM */
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for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
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for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
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writel(0, i);
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writel(0, i);
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