powerpc: MPC8569: Remove macro CONFIG_MPC8569

Replace CONFIG_MPC8569 with ARCH_MPC8569 in Kconfig and clean up existing
macros.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-11-16 11:34:52 -08:00
parent 8d85448699
commit 23b36a7d48
8 changed files with 11 additions and 9 deletions

View file

@ -88,6 +88,7 @@ config TARGET_MPC8568MDS
config TARGET_MPC8569MDS config TARGET_MPC8569MDS
bool "Support MPC8569MDS" bool "Support MPC8569MDS"
select ARCH_MPC8569
config TARGET_MPC8572DS config TARGET_MPC8572DS
bool "Support MPC8572DS" bool "Support MPC8572DS"
@ -219,6 +220,9 @@ config ARCH_MPC8560
config ARCH_MPC8568 config ARCH_MPC8568
bool bool
config ARCH_MPC8569
bool
source "board/freescale/b4860qds/Kconfig" source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig" source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig" source "board/freescale/bsc9132qds/Kconfig"

View file

@ -70,7 +70,7 @@ obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o
obj-$(CONFIG_MPC8569) += mpc8569_serdes.o obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
obj-$(CONFIG_MPC8572) += mpc8572_serdes.o obj-$(CONFIG_MPC8572) += mpc8572_serdes.o
obj-$(CONFIG_P1010) += p1010_serdes.o obj-$(CONFIG_P1010) += p1010_serdes.o
obj-$(CONFIG_P1011) += p1021_serdes.o obj-$(CONFIG_P1011) += p1021_serdes.o

View file

@ -707,7 +707,7 @@ int get_clocks (void)
#ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
gd->arch.sdhc_clk = sys_info.freq_sdhc / 2; gd->arch.sdhc_clk = sys_info.freq_sdhc / 2;
#else #else
#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\ #if defined(CONFIG_ARCH_MPC8569) || defined(CONFIG_P1010) ||\
defined(CONFIG_P1014) defined(CONFIG_P1014)
gd->arch.sdhc_clk = gd->bus_clk; gd->arch.sdhc_clk = gd->bus_clk;
#else #else

View file

@ -345,7 +345,7 @@ l2_disabled:
mtspr DBCR0,r0 mtspr DBCR0,r0
#endif #endif
#ifdef CONFIG_MPC8569 #ifdef CONFIG_ARCH_MPC8569
#define CONFIG_SYS_LBC_ADDR (CONFIG_SYS_CCSRBAR_DEFAULT + 0x5000) #define CONFIG_SYS_LBC_ADDR (CONFIG_SYS_CCSRBAR_DEFAULT + 0x5000)
#define CONFIG_SYS_LBCR_ADDR (CONFIG_SYS_LBC_ADDR + 0xd0) #define CONFIG_SYS_LBCR_ADDR (CONFIG_SYS_LBC_ADDR + 0xd0)
@ -376,7 +376,7 @@ l2_disabled:
tlbivax 0,r4 tlbivax 0,r4
isync isync
#endif /* CONFIG_MPC8569 */ #endif /* CONFIG_ARCH_MPC8569 */
/* /*
* Search for the TLB that covers the code we're executing, and shrink it * Search for the TLB that covers the code we're executing, and shrink it

View file

@ -113,7 +113,7 @@
#define CONFIG_SYS_FSL_RMU #define CONFIG_SYS_FSL_RMU
#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2 #define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
#elif defined(CONFIG_MPC8569) #elif defined(CONFIG_ARCH_MPC8569)
#define CONFIG_MAX_CPUS 1 #define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 10 #define CONFIG_SYS_FSL_NUM_LAWS 10
#define CONFIG_SYS_FSL_SEC_COMPAT 2 #define CONFIG_SYS_FSL_SEC_COMPAT 2

View file

@ -2210,7 +2210,7 @@ typedef struct ccsr_gur {
u32 gpiocr; /* GPIO control */ u32 gpiocr; /* GPIO control */
#endif #endif
u8 res3[12]; u8 res3[12];
#if defined(CONFIG_MPC8569) #if defined(CONFIG_ARCH_MPC8569)
u32 plppar1; /* Platform port pin assignment 1 */ u32 plppar1; /* Platform port pin assignment 1 */
u32 plppar2; /* Platform port pin assignment 2 */ u32 plppar2; /* Platform port pin assignment 2 */
u32 plpdir1; /* Platform port pin direction 1 */ u32 plpdir1; /* Platform port pin direction 1 */
@ -2484,7 +2484,7 @@ typedef struct ccsr_gur {
u32 svr; /* System version */ u32 svr; /* System version */
u8 res10[8]; u8 res10[8];
u32 rstcr; /* Reset control */ u32 rstcr; /* Reset control */
#if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_MPC8569) #if defined(CONFIG_ARCH_MPC8568) || defined(CONFIG_ARCH_MPC8569)
u8 res11a[76]; u8 res11a[76];
par_io_t qe_par_io[7]; par_io_t qe_par_io[7];
u8 res11b[1600]; u8 res11b[1600];

View file

@ -13,7 +13,6 @@
/* High Level Configuration Options */ /* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */ #define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC8569 1 /* MPC8569 specific */
#define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */ #define CONFIG_MPC8569MDS 1 /* MPC8569MDS board specific */
#define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */ #define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */

View file

@ -3141,7 +3141,6 @@ CONFIG_MPC83XX_GPIO_1_INIT_VALUE
CONFIG_MPC83XX_PCI2 CONFIG_MPC83XX_PCI2
CONFIG_MPC850 CONFIG_MPC850
CONFIG_MPC855 CONFIG_MPC855
CONFIG_MPC8569
CONFIG_MPC8569MDS CONFIG_MPC8569MDS
CONFIG_MPC857 CONFIG_MPC857
CONFIG_MPC8572 CONFIG_MPC8572