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arm: am437x: mux: Update mux names

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Correct and complete the mux names following AM437x Technical Reference Manual.

Signed-off-by: Bryan De Faria <bdefaria-ext@adeneo-embedded.com>
This commit is contained in:
Bryan De Faria 2015-04-02 10:57:07 +02:00 • committed by Tom Rini
parent 5296cb1d99
commit 23f2f4329d
1 changed files with 56 additions and 31 deletions
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87
arch/arm/include/asm/arch-am33xx/mux_am43xx.h
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@ -137,14 +137,62 @@ struct pad_signals {
int mcasp0_fsr; int mcasp0_fsr;
int mcasp0_axr1; int mcasp0_axr1;
int mcasp0_ahclkx; int mcasp0_ahclkx;
int xdma_event_intr0; int cam0_hd;
int xdma_event_intr1; int cam0_vd;
int cam0_field;
int cam0_wen;
int cam0_pclk;
int cam0_data8;
int cam0_data9;
int cam1_data9;
int cam1_data8;
int cam1_hd;
int cam1_vd;
int cam1_pclk;
int cam1_field;
int cam1_wen;
int cam1_data0;
int cam1_data1;
int cam1_data2;
int cam1_data3;
int cam1_data4;
int cam1_data5;
int cam1_data6;
int cam1_data7;
int cam0_data0;
int cam0_data1;
int cam0_data2;
int cam0_data3;
int cam0_data4;
int cam0_data5;
int cam0_data6;
int cam0_data7;
int uart3_rxd;
int uart3_txd;
int uart3_ctsn;
int uart3_rtsn;
int gpio5_8;
int gpio5_9;
int gpio5_10;
int gpio5_11;
int gpio5_12;
int gpio5_13;
int spi4_sclk;
int spi4_d0;
int spi4_d1;
int spi4_cs0;
int spi2_sclk;
int spi2_d0;
int spi2_d1;
int spi2_cs0;
int xdma_evt_intr0;
int xdma_evt_intr1;
int clkreq;
int nresetin_out; int nresetin_out;
int porz;
int nnmi;
int osc0_in;
int osc0_out;
int rsvd1; int rsvd1;
int nnmi;
int rsvd2;
int rsvd3;
int tms; int tms;
int tdi; int tdi;
int tdo; int tdo;
@ -154,34 +202,11 @@ struct pad_signals {
int emu1; int emu1;
int osc1_in; int osc1_in;
int osc1_out; int osc1_out;
int pmic_power_en;
int rtc_porz; int rtc_porz;
int rsvd2; int ext_wakeup0;
int ext_wakeup; int pmic_power_en0;
int enz_kaldo_1p8v;
int usb0_dm;
int usb0_dp;
int usb0_ce;
int usb0_id;
int usb0_vbus;
int usb0_drvvbus; int usb0_drvvbus;
int usb1_dm;
int usb1_dp;
int usb1_ce;
int usb1_id;
int usb1_vbus;
int usb1_drvvbus; int usb1_drvvbus;
int ddr_resetn;
int ddr_csn0;
int ddr_cke;
int ddr_ck;
int ddr_nck;
int ddr_casn;
int ddr_rasn;
int ddr_wen;
int ddr_ba0;
int ddr_ba1;
int ddr_ba2;
}; };
#endif /* _MUX_AM43XX_H_ */ #endif /* _MUX_AM43XX_H_ */