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https://github.com/Fishwaldo/u-boot.git
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* Clean up CMC PU2 flash driver
* Update MAINTAINERS file * Fix bug in MPC823 LCD driver
This commit is contained in:
parent
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commit
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7 changed files with 96 additions and 61 deletions
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@ -2,6 +2,12 @@
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Changes since U-Boot 1.1.1:
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Changes since U-Boot 1.1.1:
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======================================================================
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======================================================================
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* Clean up CMC PU2 flash driver
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* Update MAINTAINERS file
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* Fix bug in MPC823 LCD driver
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* Fix udelay() on AT91RM9200 for delays < 1 ms.
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* Fix udelay() on AT91RM9200 for delays < 1 ms.
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* Enable long help on CMC PU2 board;
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* Enable long help on CMC PU2 board;
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@ -209,6 +209,13 @@ Frank Panno <fpanno@delphintech.com>
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ep8260 MPC8260
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ep8260 MPC8260
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Peter Pearse <peter.pearse@arm.com>
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Integrator/AP CM 926EJ-S, CM7x0T, CM9x0T
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Integrator/CP CM 926EJ-S CM920T, CM940T, CM922T-XA10
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Versatile/AB ARM926EJ-S
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Versatile/PB ARM926EJ-S
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Denis Peter <d.peter@mpl.ch>
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Denis Peter <d.peter@mpl.ch>
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MIP405 PPC4xx
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MIP405 PPC4xx
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6
Makefile
6
Makefile
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@ -1197,12 +1197,12 @@ xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$
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xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
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xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
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integratorcp_config : unconfig
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@./mkconfig $(@:_config=) arm arm926ejs integratorcp
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integratorap_config : unconfig
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integratorap_config : unconfig
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@./mkconfig $(@:_config=) arm arm926ejs integratorap
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@./mkconfig $(@:_config=) arm arm926ejs integratorap
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integratorcp_config : unconfig
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@./mkconfig $(@:_config=) arm arm926ejs integratorcp
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lpd7a400_config \
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lpd7a400_config \
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lpd7a404_config: unconfig
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lpd7a404_config: unconfig
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@./mkconfig $(@:_config=) arm lh7a40x lpd7a40x
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@./mkconfig $(@:_config=) arm lh7a40x lpd7a40x
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6
README
6
README
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@ -1977,9 +1977,9 @@ Low Level (hardware related) configuration options:
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source code. It is used to make hardware dependant
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source code. It is used to make hardware dependant
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initializations.
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initializations.
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- CFG_IMMR: Physical address of the Internal Memory Mapped
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- CFG_IMMR: Physical address of the Internal Memory.
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Register; DO NOT CHANGE! (11-4)
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DO NOT CHANGE unless you know exactly what you're
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[MPC8xx systems only]
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doing! (11-4) [MPC8xx/82xx systems only]
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- CFG_INIT_RAM_ADDR:
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- CFG_INIT_RAM_ADDR:
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@ -41,7 +41,7 @@ typedef volatile unsigned short FLASH_PORT_WIDTHV;
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#define FPWV FLASH_PORT_WIDTHV
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#define FPWV FLASH_PORT_WIDTHV
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#define FLASH_CYCLE1 0x0555
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#define FLASH_CYCLE1 0x0555
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#define FLASH_CYCLE2 0x02aa
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#define FLASH_CYCLE2 0x02AA
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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* Functions
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* Functions
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@ -96,9 +96,9 @@ static void flash_reset(flash_info_t *info)
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/* Put FLASH back in read mode */
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/* Put FLASH back in read mode */
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
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*base = (FPW)0x00FF00FF; /* Intel Read Mode */
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*base = (FPW)0x00FF; /* Intel Read Mode */
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else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
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else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD)
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*base = (FPW)0x00F000F0; /* AMD Read Mode */
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*base = (FPW)0x00F0; /* AMD Read Mode */
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}
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}
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/*-----------------------------------------------------------------------
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/*-----------------------------------------------------------------------
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@ -183,9 +183,9 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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/* Write auto select command: read Manufacturer ID */
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/* Write auto select command: read Manufacturer ID */
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/* Write auto select command sequence and test FLASH answer */
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/* Write auto select command sequence and test FLASH answer */
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addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE1] = (FPW)0x00AA; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE2] = (FPW)0x0055; /* for AMD, Intel ignores this */
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addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */
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addr[FLASH_CYCLE1] = (FPW)0x0090; /* selects Intel or AMD */
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/* The manufacturer codes are only 1 byte, so just use 1 byte.
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/* The manufacturer codes are only 1 byte, so just use 1 byte.
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* This works for any bus width and any FLASH device width.
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* This works for any bus width and any FLASH device width.
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@ -262,7 +262,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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{
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FPWV *addr = (FPWV *)(info->start[0]);
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FPWV *addr = (FPWV *)(info->start[0]);
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int flag, prot, sect, l_sect;
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int flag, prot, sect, ssect, l_sect;
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ulong start, now, last;
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ulong start, now, last;
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printf ("flash_erase: first: %d last: %d\n", s_first, s_last);
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printf ("flash_erase: first: %d last: %d\n", s_first, s_last);
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@ -297,30 +297,34 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
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printf ("\n");
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printf ("\n");
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}
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}
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l_sect = -1;
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/* Disable interrupts which might cause a timeout here */
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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flag = disable_interrupts();
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addr[0x0555] = 0x00AA;
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/*
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addr[0x02AA] = 0x0055;
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* Start erase on unprotected sectors.
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addr[0x0555] = 0x0080;
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* Since the flash can erase multiple sectors with one command
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addr[0x0555] = 0x00AA;
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* we take advantage of that by doing the erase in chunks of
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addr[0x02AA] = 0x0055;
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* 3 sectors.
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*/
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for (sect = s_first; sect <= s_last; ) {
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l_sect = -1;
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/* Start erase on unprotected sectors */
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addr[FLASH_CYCLE1] = 0x00AA;
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for (sect = s_first; sect<=s_last; sect++) {
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addr[FLASH_CYCLE2] = 0x0055;
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if (info->protect[sect] == 0) { /* not protected */
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addr[FLASH_CYCLE1] = 0x0080;
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addr = (FPWV *)(info->start[sect]);
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addr[FLASH_CYCLE1] = 0x00AA;
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addr[FLASH_CYCLE2] = 0x0055;
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/* do the erase in chunks of at most 3 sectors */
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for (ssect = 0; ssect < 3; ssect++) {
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if ((sect + ssect) > s_last)
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break;
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if (info->protect[sect + ssect] == 0) { /* not protected */
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addr = (FPWV *)(info->start[sect + ssect]);
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addr[0] = 0x0030;
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addr[0] = 0x0030;
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l_sect = sect;
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l_sect = sect + ssect;
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}
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}
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}
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}
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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/* wait at least 80us - let's wait 1 ms */
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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udelay (1000);
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start = get_timer (0);
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start = get_timer (0);
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last = start;
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last = start;
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addr = (FPWV *)(info->start[l_sect]);
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addr = (FPWV *)(info->start[l_sect]);
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while ((addr[0] & 0x00000080) != 0x00000080) {
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while ((addr[0] & 0x0080) != 0x0080) {
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if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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printf ("Timeout\n");
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return 1;
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return 1;
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last = now;
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last = now;
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}
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}
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}
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}
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addr = (FPWV *)info->start[0];
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addr[0] = 0x00F0; /* reset bank */
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sect += ssect;
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}
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/* re-enable interrupts if necessary */
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if (flag)
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enable_interrupts();
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DONE:
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DONE:
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/* reset to read mode */
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/* reset to read mode */
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addr = (FPWV *)info->start[0];
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addr = (FPWV *)info->start[0];
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addr[0] = 0x000000F0; /* reset bank */
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addr[0] = 0x00F0; /* reset bank */
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printf (" done\n");
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printf (" done\n");
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return 0;
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return 0;
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/* Disable interrupts which might cause a timeout here */
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts();
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flag = disable_interrupts();
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base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */
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base[FLASH_CYCLE1] = (FPW)0x00AA; /* unlock */
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base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */
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base[FLASH_CYCLE2] = (FPW)0x0055; /* unlock */
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base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */
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base[FLASH_CYCLE1] = (FPW)0x00A0; /* selects program mode */
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*dest = data; /* start programming the data */
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*dest = data; /* start programming the data */
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start = get_timer (0);
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start = get_timer (0);
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/* data polling for D7 */
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/* data polling for D7 */
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while ((*dest & (FPW)0x00000080) != (data & (FPW)0x00000080)) {
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while ((*dest & (FPW)0x0080) != (data & (FPW)0x0080)) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
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*dest = (FPW)0x000000F0; /* reset bank */
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*dest = (FPW)0x00F0; /* reset bank */
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return (1);
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return (1);
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}
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}
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}
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}
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11
common/lcd.c
11
common/lcd.c
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cmap = (ushort *)fbi->palette;
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cmap = (ushort *)fbi->palette;
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#elif defined(CONFIG_MPC823)
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#elif defined(CONFIG_MPC823)
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cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
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cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
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#else
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# error "Don't know location of color map"
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#endif
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#endif
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/* Set color map */
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/* Set color map */
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( (cte.blue) & 0x001f) ;
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( (cte.blue) & 0x001f) ;
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#ifdef CFG_INVERT_COLORS
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#ifdef CFG_INVERT_COLORS
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*cmap++ = 0xffff - colreg;
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*cmap = 0xffff - colreg;
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#else
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#else
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*cmap++ = colreg;
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*cmap = colreg;
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#endif
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#if defined(CONFIG_PXA250)
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cmap++;
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#elif defined(CONFIG_MPC823)
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cmap--;
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#endif
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#endif
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}
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}
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}
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}
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@ -25,7 +25,7 @@ nc -u ${TARGET_IP} 6666
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stty icanon echo intr ^C
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stty icanon echo intr ^C
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+++++++++++++++++++++++++++++++++++++++++++
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+++++++++++++++++++++++++++++++++++++++++++
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It turned out that 'netcat' couldn't be used to listen to broadcast
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It turns out that 'netcat' cannot be used to listen to broadcast
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packets. We developed our own tool 'ncb' (see tools directory) that
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packets. We developed our own tool 'ncb' (see tools directory) that
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listens to broadcast packets on a given port and dumps them to the
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listens to broadcast packets on a given port and dumps them to the
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standard output. use it as follows:
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standard output. use it as follows:
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@ -87,3 +87,6 @@ To browse the Linux network console output, use the 'netcat' tool invoked
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as follows:
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as follows:
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nc -u -l -p 6666
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nc -u -l -p 6666
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Note that unlike the U-Boot implementation the Linux netconsole is
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unidirectional, i. e. you have console output only in Linux.
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