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mmc: am654_sdhci: Fix HISPD bit configuration in some lower speed modes
According to the AM654x Data Manual[1], the setup timing in lower speed modes can only be met if the controller uses a falling edge data launch. To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25 speed modes. Use the sdhci writeb callback to implement this condition. [1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
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parent
a759abf569
commit
27a87c834f
2 changed files with 24 additions and 2 deletions
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@ -526,6 +526,7 @@ config MMC_SDHCI_AM654
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depends on MMC_SDHCI
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depends on DM_MMC && OF_CONTROL && BLK
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depends on REGMAP
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select MMC_SDHCI_IO_ACCESSORS
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help
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Support for Secure Digital Host Controller Interface (SDHCI)
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controllers present on TI's AM654 SOCs.
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@ -369,6 +369,26 @@ static int am654_sdhci_deferred_probe(struct sdhci_host *host)
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return sdhci_probe(dev);
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}
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static void am654_sdhci_write_b(struct sdhci_host *host, u8 val, int reg)
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{
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if (reg == SDHCI_HOST_CONTROL) {
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switch (host->mmc->selected_mode) {
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/*
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* According to the data manual, HISPD bit
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* should not be set in these speed modes.
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*/
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case SD_HS:
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case MMC_HS:
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case UHS_SDR12:
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case UHS_SDR25:
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val &= ~SDHCI_CTRL_HISPD;
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default:
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break;
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}
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}
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writeb(val, host->ioaddr + reg);
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}
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#ifdef MMC_SUPPORTS_TUNING
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#define ITAP_MAX 32
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static int am654_sdhci_execute_tuning(struct mmc *mmc, u8 opcode)
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@ -414,6 +434,7 @@ const struct sdhci_ops am654_sdhci_ops = {
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.deferred_probe = am654_sdhci_deferred_probe,
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.set_ios_post = &am654_sdhci_set_ios_post,
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.set_control_reg = &am654_sdhci_set_control_reg,
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.write_b = am654_sdhci_write_b,
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};
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const struct am654_driver_data am654_drv_data = {
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@ -455,6 +476,7 @@ const struct sdhci_ops j721e_4bit_sdhci_ops = {
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#endif
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.deferred_probe = am654_sdhci_deferred_probe,
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.set_ios_post = &j721e_4bit_sdhci_set_ios_post,
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.write_b = am654_sdhci_write_b,
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};
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const struct am654_driver_data j721e_4bit_drv_data = {
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@ -532,6 +554,7 @@ static int am654_sdhci_probe(struct udevice *dev)
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host->max_clk = clock;
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host->mmc = &plat->mmc;
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host->mmc->dev = dev;
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host->ops = drv_data->ops;
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ret = sdhci_setup_cfg(cfg, host, cfg->f_max,
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AM654_SDHCI_MIN_FREQ);
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if (ret)
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@ -541,8 +564,6 @@ static int am654_sdhci_probe(struct udevice *dev)
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if (ret)
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return ret;
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host->ops = drv_data->ops;
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/* Update ops based on SoC revision */
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soc = soc_device_match(am654_sdhci_soc_attr);
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if (soc && soc->data) {
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