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x86: Add clarifications to the x86 README

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* Explicitly list the targets supported in each section of the
instructions from the x86 README.

* Drop references to 'raw mode', in favor of 'bare mode'.

Signed-off-by: Igor Stoppa <igor.stoppa@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Stoppa, Igor 2015-08-13 16:43:35 +03:00 • committed by Simon Glass
parent 052e34b363
commit 28a85365f8
1 changed files with 21 additions and 11 deletions
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32
doc/README.x86
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@ -18,15 +18,16 @@ U-Boot supports running as a coreboot [1] payload on x86. So far only Link
work with minimal adjustments on other x86 boards since coreboot deals with work with minimal adjustments on other x86 boards since coreboot deals with
most of the low-level details. most of the low-level details.
U-Boot also supports booting directly from x86 reset vector without coreboot, U-Boot also supports booting directly from x86 reset vector, without coreboot.
aka raw support or bare support. Currently Link, QEMU x86 targets and all In this case, known as bare mode, from the fact that it runs on the
Intel boards support running U-Boot 'bare metal'. 'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86
targets and all Intel boards support running U-Boot 'bare metal'.
As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
Linux kernel as part of a FIT image. It also supports a compressed zImage. Linux kernel as part of a FIT image. It also supports a compressed zImage.
Build Instructions Build Instructions for U-Boot as coreboot payload
------------------ -------------------------------------------------
Building U-Boot as a coreboot payload is just like building U-Boot for targets Building U-Boot as a coreboot payload is just like building U-Boot for targets
on other architectures, like below: on other architectures, like below:
@ -48,6 +49,8 @@ Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
to point to a new board. You can also change the Cache-As-RAM (CAR) related to point to a new board. You can also change the Cache-As-RAM (CAR) related
settings here if the default values do not fit your new board. settings here if the default values do not fit your new board.
Build Instructions for U-Boot as BIOS replacement (bare mode)
-------------------------------------------------------------
Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
little bit tricky, as generally it requires several binary blobs which are not little bit tricky, as generally it requires several binary blobs which are not
shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
@ -58,7 +61,9 @@ $ export BUILD_ROM=y
This tells the Makefile to build u-boot.rom as a target. This tells the Makefile to build u-boot.rom as a target.
Link-specific instructions: ---
Chromebook Link specific instructions for bare mode:
First, you need the following binary blobs: First, you need the following binary blobs:
@ -87,7 +92,9 @@ Now you can build U-Boot and obtain u-boot.rom:
$ make chromebook_link_defconfig $ make chromebook_link_defconfig
$ make all $ make all
Intel Crown Bay specific instructions: ---
Intel Crown Bay specific instructions for bare mode:
U-Boot support of Intel Crown Bay board [4] relies on a binary blob called U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
Firmware Support Package [5] to perform all the necessary initialization steps Firmware Support Package [5] to perform all the necessary initialization steps
@ -122,7 +129,9 @@ Now you can build U-Boot and obtain u-boot.rom
$ make crownbay_defconfig $ make crownbay_defconfig
$ make all $ make all
Intel Minnowboard Max instructions: ---
Intel Minnowboard Max instructions for bare mode:
This uses as FSP as with Crown Bay, except it is for the Atom E3800 series. This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
@ -188,8 +197,9 @@ Offset Description Controlling config
Overall ROM image size is controlled by CONFIG_ROM_SIZE. Overall ROM image size is controlled by CONFIG_ROM_SIZE.
---
Intel Galileo instructions: Intel Galileo instructions for bare mode:
Only one binary blob is needed for Remote Management Unit (RMU) within Intel Only one binary blob is needed for Remote Management Unit (RMU) within Intel
Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
@ -252,8 +262,8 @@ At present it seems that for Minnowboard Max, coreboot does not pass through
the video information correctly (it always says the resolution is 0x0). This the video information correctly (it always says the resolution is 0x0). This
works correctly for link though. works correctly for link though.
Test with QEMU Test with QEMU for bare mode
-------------- ----------------------------
QEMU is a fancy emulator that can enable us to test U-Boot without access to QEMU is a fancy emulator that can enable us to test U-Boot without access to
a real x86 board. Please make sure your QEMU version is 2.3.0 or above test a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: