mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 14:41:31 +00:00
armv8/ls1043aqds: Add lpuart support
Add lpuart support using the driver model. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
parent
8e728aa915
commit
2970e14f65
6 changed files with 90 additions and 0 deletions
|
@ -98,6 +98,7 @@ dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
|
|||
dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
|
||||
fsl-ls2080a-rdb.dtb
|
||||
dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
|
||||
fsl-ls1043a-qds-lpuart.dtb \
|
||||
fsl-ls1043a-rdb.dtb
|
||||
|
||||
dtb-$(CONFIG_MACH_SUN4I) += \
|
||||
|
|
16
arch/arm/dts/fsl-ls1043a-qds-lpuart.dts
Normal file
16
arch/arm/dts/fsl-ls1043a-qds-lpuart.dts
Normal file
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Device Tree file for Freescale Layerscape-1043A family SoC.
|
||||
*
|
||||
* Copyright (C) 2015, Freescale Semiconductor
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "fsl-ls1043a-qds.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = &lpuart0;
|
||||
};
|
||||
};
|
|
@ -121,3 +121,7 @@
|
|||
&duart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&lpuart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -182,5 +182,59 @@
|
|||
interrupts = <0 55 0x4>;
|
||||
clocks = <&clockgen 4 0>;
|
||||
};
|
||||
|
||||
lpuart0: serial@2950000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x2950000 0x0 0x1000>;
|
||||
interrupts = <0 48 0x4>;
|
||||
clocks = <&sysclk>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpuart1: serial@2960000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x2960000 0x0 0x1000>;
|
||||
interrupts = <0 49 0x4>;
|
||||
clocks = <&sysclk>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpuart2: serial@2970000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x2970000 0x0 0x1000>;
|
||||
interrupts = <0 50 0x4>;
|
||||
clock-names = "ipg";
|
||||
clocks = <&sysclk>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpuart3: serial@2980000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x2980000 0x0 0x1000>;
|
||||
interrupts = <0 51 0x4>;
|
||||
clocks = <&sysclk>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpuart4: serial@2990000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x2990000 0x0 0x1000>;
|
||||
interrupts = <0 52 0x4>;
|
||||
clocks = <&sysclk>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lpuart5: serial@29a0000 {
|
||||
compatible = "fsl,ls1021a-lpuart";
|
||||
reg = <0x0 0x29a0000 0x0 0x1000>;
|
||||
interrupts = <0 53 0x4>;
|
||||
clocks = <&sysclk>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
10
configs/ls1043aqds_lpuart_defconfig
Normal file
10
configs/ls1043aqds_lpuart_defconfig
Normal file
|
@ -0,0 +1,10 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_TARGET_LS1043AQDS=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart"
|
||||
CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART"
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_FSL_LPUART=y
|
|
@ -88,6 +88,11 @@ unsigned long get_board_ddr_clk(void);
|
|||
#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1043aqds/ls1043aqds_rcw_sd_ifc.cfg
|
||||
#endif
|
||||
|
||||
/* LPUART */
|
||||
#ifdef CONFIG_LPUART
|
||||
#define CONFIG_LPUART_32B_REG
|
||||
#endif
|
||||
|
||||
/* SATA */
|
||||
#define CONFIG_LIBATA
|
||||
#define CONFIG_SCSI_AHCI
|
||||
|
|
Loading…
Add table
Reference in a new issue