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ARM: dts: rmobile: r8a77990: Add USB2.0(EHCI) DT nodes on Ebisu

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Add device tree nodes for USB2.0(EHCI) on R-Car E3 Ebisu board.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
This commit is contained in:
Hiroyuki Yokoyama 2018-09-27 19:05:18 +09:00 • committed by Marek Vasut
parent cf97b2213a
commit 2a1eade825
3 changed files with 74 additions and 0 deletions
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16
arch/arm/dts/r8a77990-ebisu.dts
View file

@ -65,6 +65,10 @@
}; };
}; };
&ehci0 {
status = "okay";
};
&extal_clk { &extal_clk {
clock-frequency = <48000000>; clock-frequency = <48000000>;
}; };
@ -101,6 +105,18 @@
function = "sdhi3"; function = "sdhi3";
power-source = <1800>; power-source = <1800>;
}; };
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
};
};
&usb2_phy0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-name = "default";
status = "okay";
}; };
&sdhi0 { &sdhi0 {

38
arch/arm/dts/r8a77990.dtsi
View file

@ -7,6 +7,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h> #include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77990-sysc.h>
/ { / {
compatible = "renesas,r8a77990"; compatible = "renesas,r8a77990";
@ -165,6 +166,43 @@
resets = <&cpg 906>; resets = <&cpg 906>;
}; };
ohci0: usb@ee080000 {
compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
};
ehci0: usb@ee080100 {
compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
companion = <&ohci0>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
};
usb2_phy0: usb-phy@ee080200 {
compatible = "renesas,usb2-phy-r8a7790",
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
resets = <&cpg 703>;
#phy-cells = <0>;
status = "disabled";
};
pfc: pin-controller@e6060000 { pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a77990"; compatible = "renesas,pfc-r8a77990";
reg = <0 0xe6060000 0 0x508>; reg = <0 0xe6060000 0 0x508>;

20
include/dt-bindings/power/r8a77990-sysc.h Normal file
View file

@ -0,0 +1,20 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2018 Renesas Electronics Corp.
*/
#ifndef __DT_BINDINGS_POWER_R8A77990_SYSC_H__
#define __DT_BINDINGS_POWER_R8A77990_SYSC_H__
/*
* These power domain indices match the numbers of the interrupt bits
* representing the power areas in the various Interrupt Registers
* (e.g. SYSCISR, Interrupt Status Register)
*/
#define R8A77990_PD_CA53_CPU0 5
#define R8A77990_PD_CA53_SCU 21
/* Always-on power area */
#define R8A77990_PD_ALWAYS_ON 32
#endif /* __DT_BINDINGS_POWER_R8A77990_SYSC_H__ */