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85xx: Don't icbi when unlocking the cache

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There is no reason to icbi when invalidating the temporary stack in
the d-cache.  Its impossible on e500 to have the i-cache contain
any addresses in the temp stack and it can be problematic in generating
transactions on the bus to non-valid addresses.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Kumar Gala 2008-02-27 16:30:47 -06:00 • committed by Andrew Fleming-AFLEMING
parent 534ea6b6f8
commit 2b22fa4bae
1 changed files with 2 additions and 5 deletions
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7
cpu/mpc85xx/start.S
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@ -992,7 +992,6 @@ trap_reloc:
blr blr
#ifdef CFG_INIT_RAM_LOCK
.globl unlock_ram_in_cache .globl unlock_ram_in_cache
unlock_ram_in_cache: unlock_ram_in_cache:
/* invalidate the INIT_RAM section */ /* invalidate the INIT_RAM section */
@ -1002,11 +1001,10 @@ unlock_ram_in_cache:
andi. r4,r4,0x1ff andi. r4,r4,0x1ff
slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT) slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT)
mtctr r4 mtctr r4
1: icbi r0,r3 1: dcbi r0,r3
dcbi r0,r3
addi r3,r3,CFG_CACHELINE_SIZE addi r3,r3,CFG_CACHELINE_SIZE
bdnz 1b bdnz 1b
sync /* Wait for all icbi to complete on bus */ sync
/* Invalidate the TLB entries for the cache */ /* Invalidate the TLB entries for the cache */
lis r3,CFG_INIT_RAM_ADDR@h lis r3,CFG_INIT_RAM_ADDR@h
@ -1020,4 +1018,3 @@ unlock_ram_in_cache:
tlbivax 0,r3 tlbivax 0,r3
isync isync
blr blr
#endif