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m68k: ColdFire mcf5441x, add eSDHC support

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This patch adds mcf5441x eSDHC support for the mcf5441x family.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
This commit is contained in:
Angelo Dureghello 2018-01-25 22:42:52 +01:00
parent faae49543a
commit 2c92e4fbc6
3 changed files with 15 additions and 0 deletions
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10
arch/m68k/cpu/mcf5445x/cpu_init.c
View file

@ -173,6 +173,15 @@ void cpu_init_f(void)
/* Lowest slew rate for UART0,1,2 */ /* Lowest slew rate for UART0,1,2 */
out_8(&gpio->srcr_uart, 0x00); out_8(&gpio->srcr_uart, 0x00);
#ifdef CONFIG_FSL_ESDHC
/* eSDHC pin as faster speed */
out_8(&gpio->srcr_sdhc, 0x03);
/* All esdhc pins as SD */
out_8(&gpio->par_sdhch, 0xff);
out_8(&gpio->par_sdhcl, 0xff);
#endif
#endif /* CONFIG_MCF5441x */ #endif /* CONFIG_MCF5441x */
#ifdef CONFIG_MCF5445x #ifdef CONFIG_MCF5445x
@ -534,4 +543,5 @@ void cfspi_release_bus(uint bus, uint cs)
clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
#endif #endif
} }
#endif #endif

2
arch/m68k/cpu/mcf5445x/speed.c
View file

@ -120,6 +120,8 @@ void setup_5441x_clocks(void)
temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1; temp = ((pdr & PLL_DR_OUTDIV2_BITS) >> 5) + 1;
gd->bus_clk = vco / temp; /* bus clock */ gd->bus_clk = vco / temp; /* bus clock */
temp = ((pdr & PLL_DR_OUTDIV3_BITS) >> 10) + 1;
gd->arch.sdhc_clk = vco / temp;
} }
#endif #endif

3
arch/m68k/include/asm/global_data.h
View file

@ -18,6 +18,9 @@ struct arch_global_data {
unsigned long vco_clk; unsigned long vco_clk;
unsigned long flb_clk; unsigned long flb_clk;
#endif #endif
#ifdef CONFIG_MCF5441x
unsigned long sdhc_clk;
#endif
}; };
#include <asm-generic/global_data.h> #include <asm-generic/global_data.h>