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i2c: designware: Get clock rate from clock DM
Get clock rate from clock DM if CONFIG_CLK is enabled. Otherwise, uses IC_CLK define. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
parent
e3b93dcee8
commit
2d1e879c79
1 changed files with 45 additions and 10 deletions
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@ -4,6 +4,7 @@
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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*/
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*/
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#include <clk.h>
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#include <common.h>
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#include <common.h>
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#include <dm.h>
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#include <dm.h>
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#include <i2c.h>
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#include <i2c.h>
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@ -35,6 +36,9 @@ struct dw_i2c {
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struct i2c_regs *regs;
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struct i2c_regs *regs;
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struct dw_scl_sda_cfg *scl_sda_cfg;
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struct dw_scl_sda_cfg *scl_sda_cfg;
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struct reset_ctl_bulk resets;
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struct reset_ctl_bulk resets;
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#if CONFIG_IS_ENABLED(CLK)
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struct clk clk;
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#endif
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};
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};
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#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
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#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
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@ -78,7 +82,8 @@ static int dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
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*/
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*/
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static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,
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static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,
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struct dw_scl_sda_cfg *scl_sda_cfg,
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struct dw_scl_sda_cfg *scl_sda_cfg,
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unsigned int speed)
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unsigned int speed,
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unsigned int bus_mhz)
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{
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{
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unsigned int cntl;
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unsigned int cntl;
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unsigned int hcnt, lcnt;
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unsigned int hcnt, lcnt;
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@ -108,8 +113,8 @@ static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,
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hcnt = scl_sda_cfg->fs_hcnt;
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hcnt = scl_sda_cfg->fs_hcnt;
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lcnt = scl_sda_cfg->fs_lcnt;
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lcnt = scl_sda_cfg->fs_lcnt;
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} else {
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} else {
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hcnt = (IC_CLK * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
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hcnt = (bus_mhz * MIN_HS_SCL_HIGHTIME) / NANO_TO_MICRO;
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lcnt = (IC_CLK * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
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lcnt = (bus_mhz * MIN_HS_SCL_LOWTIME) / NANO_TO_MICRO;
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}
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}
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writel(hcnt, &i2c_base->ic_hs_scl_hcnt);
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writel(hcnt, &i2c_base->ic_hs_scl_hcnt);
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writel(lcnt, &i2c_base->ic_hs_scl_lcnt);
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writel(lcnt, &i2c_base->ic_hs_scl_lcnt);
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@ -122,8 +127,8 @@ static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,
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hcnt = scl_sda_cfg->ss_hcnt;
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hcnt = scl_sda_cfg->ss_hcnt;
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lcnt = scl_sda_cfg->ss_lcnt;
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lcnt = scl_sda_cfg->ss_lcnt;
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} else {
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} else {
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hcnt = (IC_CLK * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
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hcnt = (bus_mhz * MIN_SS_SCL_HIGHTIME) / NANO_TO_MICRO;
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lcnt = (IC_CLK * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
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lcnt = (bus_mhz * MIN_SS_SCL_LOWTIME) / NANO_TO_MICRO;
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}
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}
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writel(hcnt, &i2c_base->ic_ss_scl_hcnt);
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writel(hcnt, &i2c_base->ic_ss_scl_hcnt);
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writel(lcnt, &i2c_base->ic_ss_scl_lcnt);
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writel(lcnt, &i2c_base->ic_ss_scl_lcnt);
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@ -136,8 +141,8 @@ static unsigned int __dw_i2c_set_bus_speed(struct i2c_regs *i2c_base,
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hcnt = scl_sda_cfg->fs_hcnt;
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hcnt = scl_sda_cfg->fs_hcnt;
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lcnt = scl_sda_cfg->fs_lcnt;
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lcnt = scl_sda_cfg->fs_lcnt;
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} else {
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} else {
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hcnt = (IC_CLK * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
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hcnt = (bus_mhz * MIN_FS_SCL_HIGHTIME) / NANO_TO_MICRO;
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lcnt = (IC_CLK * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
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lcnt = (bus_mhz * MIN_FS_SCL_LOWTIME) / NANO_TO_MICRO;
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}
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}
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writel(hcnt, &i2c_base->ic_fs_scl_hcnt);
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writel(hcnt, &i2c_base->ic_fs_scl_hcnt);
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writel(lcnt, &i2c_base->ic_fs_scl_lcnt);
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writel(lcnt, &i2c_base->ic_fs_scl_lcnt);
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@ -393,7 +398,7 @@ static int __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
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writel(IC_TX_TL, &i2c_base->ic_tx_tl);
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writel(IC_TX_TL, &i2c_base->ic_tx_tl);
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writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
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writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
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#ifndef CONFIG_DM_I2C
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#ifndef CONFIG_DM_I2C
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__dw_i2c_set_bus_speed(i2c_base, NULL, speed);
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__dw_i2c_set_bus_speed(i2c_base, NULL, speed, IC_CLK);
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writel(slaveaddr, &i2c_base->ic_sar);
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writel(slaveaddr, &i2c_base->ic_sar);
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#endif
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#endif
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@ -438,7 +443,7 @@ static unsigned int dw_i2c_set_bus_speed(struct i2c_adapter *adap,
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unsigned int speed)
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unsigned int speed)
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{
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{
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adap->speed = speed;
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adap->speed = speed;
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return __dw_i2c_set_bus_speed(i2c_get_base(adap), NULL, speed);
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return __dw_i2c_set_bus_speed(i2c_get_base(adap), NULL, speed, IC_CLK);
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}
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}
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static void dw_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
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static void dw_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
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@ -528,8 +533,20 @@ static int designware_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
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static int designware_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
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static int designware_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
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{
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{
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struct dw_i2c *i2c = dev_get_priv(bus);
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struct dw_i2c *i2c = dev_get_priv(bus);
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ulong rate;
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return __dw_i2c_set_bus_speed(i2c->regs, i2c->scl_sda_cfg, speed);
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#if CONFIG_IS_ENABLED(CLK)
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rate = clk_get_rate(&i2c->clk);
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if (IS_ERR_VALUE(rate))
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return -EINVAL;
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/* Convert to MHz */
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rate /= 1000000;
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#else
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rate = IC_CLK;
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#endif
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return __dw_i2c_set_bus_speed(i2c->regs, i2c->scl_sda_cfg, speed,
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rate);
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}
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}
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static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr,
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static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr,
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@ -573,6 +590,19 @@ static int designware_i2c_probe(struct udevice *bus)
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else
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else
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reset_deassert_bulk(&priv->resets);
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reset_deassert_bulk(&priv->resets);
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#if CONFIG_IS_ENABLED(CLK)
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ret = clk_get_by_index(bus, 0, &priv->clk);
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if (ret)
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return ret;
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ret = clk_enable(&priv->clk);
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if (ret && ret != -ENOSYS && ret != -ENOTSUPP) {
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clk_free(&priv->clk);
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dev_err(bus, "failed to enable clock\n");
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return ret;
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}
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#endif
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return __dw_i2c_init(priv->regs, 0, 0);
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return __dw_i2c_init(priv->regs, 0, 0);
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}
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}
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@ -580,6 +610,11 @@ static int designware_i2c_remove(struct udevice *dev)
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{
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{
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struct dw_i2c *priv = dev_get_priv(dev);
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struct dw_i2c *priv = dev_get_priv(dev);
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#if CONFIG_IS_ENABLED(CLK)
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clk_disable(&priv->clk);
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clk_free(&priv->clk);
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#endif
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return reset_release_bulk(&priv->resets);
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return reset_release_bulk(&priv->resets);
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}
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}
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