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Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
This commit is contained in:
commit
3070a9a3cb
5 changed files with 16 additions and 4 deletions
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@ -90,7 +90,7 @@ phys_size_t initdram(int board_type)
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int checkboard(void)
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int checkboard(void)
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{
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{
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puts("Board: Matrix Vision mvBlueLYNX-M7 " MV_VERSION "\n");
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puts("Board: Matrix Vision mvBlueLYNX-M7\n");
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return 0;
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return 0;
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}
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}
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@ -44,7 +44,6 @@ int checkcpu(void)
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char buf[32];
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char buf[32];
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int i;
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int i;
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#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
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const struct cpu_type {
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const struct cpu_type {
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char name[15];
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char name[15];
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u32 partid;
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u32 partid;
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@ -181,8 +181,13 @@ void cpu_init_f (volatile immap_t * im)
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/* System General Purpose Register */
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/* System General Purpose Register */
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#ifdef CFG_SICRH
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#ifdef CFG_SICRH
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#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313)
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/* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
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im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CFG_SICRH;
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#else
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im->sysconf.sicrh = CFG_SICRH;
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im->sysconf.sicrh = CFG_SICRH;
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#endif
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#endif
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#endif
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#ifdef CFG_SICRL
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#ifdef CFG_SICRL
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im->sysconf.sicrl = CFG_SICRL;
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im->sysconf.sicrl = CFG_SICRL;
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#endif
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#endif
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@ -970,8 +970,15 @@ struct cpu_type {
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struct cpu_type *identify_cpu(u32 ver);
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struct cpu_type *identify_cpu(u32 ver);
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#if defined(CONFIG_MPC85xx)
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#define CPU_TYPE_ENTRY(n, v) \
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#define CPU_TYPE_ENTRY(n, v) \
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{ .name = #n, .soc_ver = SVR_##v, }
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{ .name = #n, .soc_ver = SVR_##v, }
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#else
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#if defined(CONFIG_MPC83XX)
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#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
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#endif
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#endif
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#ifndef CONFIG_MACH_SPECIFIC
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#ifndef CONFIG_MACH_SPECIFIC
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extern int _machine;
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extern int _machine;
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@ -27,7 +27,7 @@
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#ifndef __CONFIG_H
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define __CONFIG_H
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#define MV_VERSION "v1.0.1"
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#include <version.h>
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/*
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/*
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* High Level Configuration Options
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* High Level Configuration Options
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@ -336,6 +336,7 @@
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#define CFG_HID0_FINAL CFG_HID0_INIT
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#define CFG_HID0_FINAL CFG_HID0_INIT
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#define CFG_HID2 HID2_HBE
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#define CFG_HID2 HID2_HBE
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#define CONFIG_HIGH_BATS 1
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/* DDR */
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/* DDR */
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#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
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#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
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@ -446,7 +447,7 @@
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"mv_dtb_addr=" MV_DTB_ADDR "\0" \
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"mv_dtb_addr=" MV_DTB_ADDR "\0" \
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"mv_dtb_addr_ram=" MV_DTB_ADDR_RAM "\0" \
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"mv_dtb_addr_ram=" MV_DTB_ADDR_RAM "\0" \
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"dtb_name=" MV_DTB_NAME "\0" \
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"dtb_name=" MV_DTB_NAME "\0" \
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"mv_version=" MV_VERSION "\0" \
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"mv_version=" U_BOOT_VERSION "\0" \
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"dhcp_client_id=" MV_CI "\0" \
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"dhcp_client_id=" MV_CI "\0" \
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"dhcp_vendor-class-identifier=" MV_VCI "\0" \
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"dhcp_vendor-class-identifier=" MV_VCI "\0" \
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"netretry=no\0" \
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"netretry=no\0" \
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