From 3482c7c13ccda10ba88ab79ec097a410704646d9 Mon Sep 17 00:00:00 2001
From: Walker Chen <walker.chen@starfivetech.com>
Date: Sun, 7 Nov 2021 12:06:49 +0800
Subject: [PATCH 1/7] net/phy: add YuTai Corp Ethernet PHYs(YT8511/YT8521)
driver
This pathch adds YuTai Corp Ethernet PHYs(YT8511/YT8521) support.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
drivers/net/phy/Kconfig | 3 +
drivers/net/phy/Makefile | 1 +
drivers/net/phy/motorcomm.c | 282 ++++++++++++++++++++++++++++++++++++
drivers/net/phy/phy.c | 3 +
include/phy.h | 1 +
5 files changed, 290 insertions(+)
create mode 100644 drivers/net/phy/motorcomm.c
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 64d5ddf238..07343e92c1 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -204,6 +204,9 @@ endif # PHY_MICREL
config PHY_MSCC
bool "Microsemi Corp Ethernet PHYs support"
+config PHY_YUTAI
+ bool "YuTai Corp Ethernet PHYs support"
+
config PHY_NATSEMI
bool "National Semiconductor Ethernet PHYs support"
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 218b8c7669..92e86f6f1a 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -35,3 +35,4 @@ obj-$(CONFIG_PHY_VITESSE) += vitesse.o
obj-$(CONFIG_PHY_MSCC) += mscc.o
obj-$(CONFIG_PHY_FIXED) += fixed.o
obj-$(CONFIG_PHY_NCSI) += ncsi.o
+obj-$(CONFIG_PHY_YUTAI) += motorcomm.o
diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
new file mode 100644
index 0000000000..7cc906bd3c
--- /dev/null
+++ b/drivers/net/phy/motorcomm.c
@@ -0,0 +1,282 @@
+/*
+ * RealTek PHY drivers
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * author Andy Fleming
+ *
+ */
+#include <config.h>
+#include <common.h>
+#include <phy.h>
+
+
+#define REG_PHY_SPEC_STATUS 0x11
+#define REG_DEBUG_ADDR_OFFSET 0x1e
+#define REG_DEBUG_DATA 0x1f
+#define EXTREG_SLEEP_CONTROL 0x27
+
+#define YT8512_DUPLEX 0x2000
+#define YT8521_SPEED_MODE 0xc000
+#define YT8521_DUPLEX 0x2000
+#define YT8521_SPEED_MODE_BIT 14
+#define YT8521_DUPLEX_BIT 13
+#define YT8521_LINK_STATUS_BIT 10
+
+#define SPEED_UNKNOWN -1
+
+static int ytphy_read_ext(struct phy_device *phydev, u32 regnum)
+{
+ int ret;
+
+ ret = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, regnum);
+ if (ret < 0)
+ return ret;
+
+ return phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
+}
+
+static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val)
+{
+ int ret;
+
+ ret = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, regnum);
+ if (ret < 0)
+ return ret;
+
+ return phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
+}
+
+static int yt8511_config(struct phy_device *phydev)
+{
+ u16 val = 0;
+ int err = 0;
+
+ genphy_config_aneg(phydev);
+
+ /* disable sleep mode */
+ err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, EXTREG_SLEEP_CONTROL);
+ if (err < 0) {
+ printf("yt8511_config: write EXTREG_SLEEP_CONTROL error!\n");
+ return err;
+ }
+
+ val = phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
+ val &= ~(1<<15);
+ err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
+ if (err < 0) {
+ printf("yt8511_config: write REG_DEBUG_DATA error!\n");
+ return err;
+ }
+
+ /* config PLL clock */
+ err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, 0xc);
+ if (err < 0) {
+ printf("yt8511_config: write 0xc error!\n");
+ return err;
+ }
+
+ val = phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
+ /* ext reg 0xc.b[2:1]
+ 00-----25M from pll;
+ 01---- 25M from xtl;(default)
+ 10-----62.5M from pll;
+ 11----125M from pll(here set to this value)
+ */
+
+ val &= ~(3<<1); //00-----25M from pll;
+ val |= (1<<1); //01-----25M from xtl; (default)
+ err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
+ if (err < 0) {
+ printf("yt8511_config: set PLL error!\n");
+ return err;
+ }
+
+ return 0;
+}
+
+static int yt8521_config(struct phy_device *phydev)
+{
+ int ret, val;
+
+ ytphy_write_ext(phydev, 0xa000, 0);
+
+ genphy_config_aneg(phydev);
+
+ /* disable auto sleep */
+ val = ytphy_read_ext(phydev, EXTREG_SLEEP_CONTROL);
+ if (val < 0) {
+ printf("yt8521_config: read EXTREG_SLEEP_CONTROL error!\n");
+ return val;
+ }
+
+ val &= ~(1<<15);
+ ret = ytphy_write_ext(phydev, EXTREG_SLEEP_CONTROL, val);
+ if (ret < 0) {
+ printf("yt8521_config: write EXTREG_SLEEP_CONTROL error!\n");
+ return ret;
+ }
+
+ /* enable tx delay 450ps per step */
+ val = ytphy_read_ext(phydev, 0xa003);
+ if (val < 0) {
+ printf("yt8521_config: read 0xa003 error!\n");
+ return val;
+ }
+ val |= 0x3;
+ ret = ytphy_write_ext(phydev, 0xa003, val);
+ if (ret < 0) {
+ printf("yt8521_config: set 0xa003 error!\n");
+ return ret;
+ }
+
+ /* disable rx delay */
+ val = ytphy_read_ext(phydev, 0xa001);
+ if (val < 0) {
+ printf("yt8521_config: read 0xa001 error!\n");
+ return val;
+ }
+ val &= ~(1<<8);
+ ret = ytphy_write_ext(phydev, 0xa001, val);
+ if (ret < 0) {
+ printf("yt8521_config: failed to disable rx_delay!\n");
+ return ret;
+ }
+
+ /* enable RXC clock when no wire plug */
+ ret = ytphy_write_ext(phydev, 0xa000, 0);
+ if (ret < 0) {
+ printf("yt8521_config: failed to enable RXC clock!\n");
+ return ret;
+ }
+
+ val = ytphy_read_ext(phydev, 0xc);
+ if (val < 0) {
+ printf("yt8521_config: read 0xc error!\n");
+ return val;
+ }
+
+ val &= ~(1 << 12);
+ ret = ytphy_write_ext(phydev, 0xc, val);
+ if (ret < 0) {
+ printf("yt8521_config: set 0xc error!\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static int yt8521_adjust_status(struct phy_device *phydev, int val, int is_utp)
+{
+ int speed_mode, duplex;
+ int speed = SPEED_UNKNOWN;
+
+ duplex = (val & YT8512_DUPLEX) >> YT8521_DUPLEX_BIT;
+ speed_mode = (val & YT8521_SPEED_MODE) >> YT8521_SPEED_MODE_BIT;
+ switch (speed_mode) {
+ case 0:
+ if (is_utp)
+ speed = SPEED_10;
+ break;
+ case 1:
+ speed = SPEED_100;
+ break;
+ case 2:
+ speed = SPEED_1000;
+ break;
+ case 3:
+ break;
+ default:
+ speed = SPEED_UNKNOWN;
+ break;
+ }
+
+ phydev->speed = speed;
+ phydev->duplex = duplex;
+
+ return 0;
+}
+
+static int yt8521_parse_status(struct phy_device *phydev)
+{
+ int ret, val, link, link_utp;
+
+ /* reading UTP */
+ ret = ytphy_write_ext(phydev, 0xa000, 0);
+ if (ret < 0)
+ return ret;
+
+ val = phy_read(phydev, MDIO_DEVAD_NONE, REG_PHY_SPEC_STATUS);
+ if (val < 0)
+ return val;
+
+ link = val & (BIT(YT8521_LINK_STATUS_BIT));
+ if (link) {
+ link_utp = 1;
+ yt8521_adjust_status(phydev, val, 1);
+ } else {
+ link_utp = 0;
+ }
+
+ if (link_utp) {
+ phydev->link = 1;
+ ytphy_write_ext(phydev, 0xa000, 0);
+ } else {
+ phydev->link = 0;
+ }
+
+ return 0;
+}
+
+static int yt8521_startup(struct phy_device *phydev)
+{
+ int retval;
+
+ retval = genphy_update_link(phydev);
+ if (retval)
+ return retval;
+
+ return yt8521_parse_status(phydev);
+}
+
+static struct phy_driver YT8511_driver = {
+ .name = "YuTai YT8511",
+ .uid = 0x0000010a,
+ .mask = 0x00000fff,
+ .features = PHY_GBIT_FEATURES,
+ .config = &yt8511_config,
+ .startup = &genphy_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+static struct phy_driver YT8521_driver = {
+ .name = "YuTai YT8521",
+ .uid = 0x0000011a,
+ .mask = 0x00000fff,
+ .features = PHY_GBIT_FEATURES,
+ .config = &yt8521_config,
+ .startup = &yt8521_startup,
+ .shutdown = &genphy_shutdown,
+};
+
+int phy_yutai_init(void)
+{
+ phy_register(&YT8511_driver);
+ phy_register(&YT8521_driver);
+
+ return 0;
+}
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 69acb69460..0e728a5022 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -561,6 +561,9 @@ int phy_init(void)
#endif
#ifdef CONFIG_PHY_XILINX_GMII2RGMII
phy_xilinx_gmii2rgmii_init();
+#endif
+#ifdef CONFIG_PHY_YUTAI
+ phy_yutai_init();
#endif
genphy_init();
diff --git a/include/phy.h b/include/phy.h
index 6b928636b6..b3b618465c 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -538,6 +538,7 @@ int phy_mscc_init(void);
int phy_fixed_init(void);
int phy_ncsi_init(void);
int phy_xilinx_gmii2rgmii_init(void);
+int phy_yutai_init(void);
int board_phy_config(struct phy_device *phydev);
int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
From 26e56a202d6af54a19c2bc97ef1ab5b8804b3f54 Mon Sep 17 00:00:00 2001
From: "Jianlong.Huang" <jianlong.huang@starfivetech.com>
Date: Sun, 7 Nov 2021 12:33:44 +0800
Subject: [PATCH 2/7] starfive: add JH7100 VisionFive V1 Support.
Signed-off-by: Jianlong.Huang <jianlong.huang@starfivetech.com>
---
arch/riscv/dts/Makefile | 1 +
arch/riscv/dts/jh7100-visionfive.dts | 17 ++
...starfive_jh7100_visionfive_smode_defconfig | 162 ++++++++++++++++++
3 files changed, 180 insertions(+)
create mode 100644 arch/riscv/dts/jh7100-visionfive.dts
create mode 100644 configs/starfive_jh7100_visionfive_smode_defconfig
diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 62ce60c409..4a965cc11b 100644
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -12,6 +12,7 @@ dtb-$(CONFIG_JH_EVB_V1) += starfive_jh7100_evb.dtb
dtb-$(CONFIG_JH_STARLIGHT) += starfive_jh7100_starlight.dtb
dtb-$(CONFIG_JH_STARLIGHT) += jh7100-beaglev-starlight.dtb
dtb-$(CONFIG_JH_STARLIGHT) += jh7100-beaglev-starlight-a1.dtb
+dtb-$(CONFIG_JH_STARLIGHT) += jh7100-visionfive.dtb
endif
targets += $(dtb-y)
diff --git a/arch/riscv/dts/jh7100-visionfive.dts b/arch/riscv/dts/jh7100-visionfive.dts
new file mode 100644
index 0000000000..33e51950b7
--- /dev/null
+++ b/arch/riscv/dts/jh7100-visionfive.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/* Copyright (c) 2021 Jianlong Huang <jianlong.huang@starfivetech.com> */
+
+/dts-v1/;
+#include "jh7100-beaglev-starlight.dts"
+
+/ {
+ model = "StarFive VisionFive V1";
+};
+
+&i2c0 {
+ eeprom_dev:eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
\ No newline at end of file
diff --git a/configs/starfive_jh7100_visionfive_smode_defconfig b/configs/starfive_jh7100_visionfive_smode_defconfig
new file mode 100644
index 0000000000..5092991653
--- /dev/null
+++ b/configs/starfive_jh7100_visionfive_smode_defconfig
@@ -0,0 +1,162 @@
+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_LEN=0x800000
+CONFIG_SYS_MALLOC_F_LEN=0x3000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x200000000
+CONFIG_ENV_SIZE=0x1f000
+CONFIG_ENV_SECT_SIZE=0x1000
+# CONFIG_DM_GPIO is not set
+CONFIG_DEFAULT_DEVICE_TREE="jh7100-visionfive"
+CONFIG_IDENT_STRING="StarFive"
+CONFIG_SYS_CLK_FREQ=1000000000
+CONFIG_TARGET_STARFIVE_JH7100=y
+CONFIG_JH_STARLIGHT=y
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_SHOW_REGS=y
+CONFIG_LOCALVERSION="-VisionFive"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_BOOT_GET_CMDLINE=y
+CONFIG_SYS_BOOT_GET_KBD=y
+CONFIG_SYS_LOAD_ADDR=0x80200000
+CONFIG_FIT=y
+CONFIG_CHROMEOS=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_QSPI_BOOT=y
+CONFIG_SD_BOOT=y
+CONFIG_SPI_BOOT=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_DELAY_STR="f"
+CONFIG_AUTOBOOT_STOP_STR="v"
+CONFIG_AUTOBOOT_KEYED_CTRLC=y
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="run mmcbootenv"
+CONFIG_DEFAULT_FDT_FILE="starfive/jh7100-visionfive.dtb"
+CONFIG_CONSOLE_RECORD=y
+CONFIG_LOG_MAX_LEVEL=5
+CONFIG_LOG_ERROR_RETURN=y
+CONFIG_DISPLAY_CPUINFO=y
+CONFIG_DISPLAY_BOARDINFO=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SYS_PROMPT="VisionFive #"
+CONFIG_CMD_CONFIG=y
+CONFIG_CMD_LICENSE=y
+CONFIG_CMD_SBI=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_BOOTM_OPENRTOS=y
+CONFIG_CMD_BOOTEFI_SELFTEST=y
+CONFIG_CMD_IMLS=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_ENV_CALLBACK=y
+CONFIG_CMD_ENV_FLAGS=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_NVEDIT_INFO=y
+CONFIG_CMD_NVEDIT_LOAD=y
+CONFIG_CMD_NVEDIT_SELECT=y
+CONFIG_CMD_BINOP=y
+CONFIG_CRC32_VERIFY=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_EEPROM_SIZE=512
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=4
+CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
+CONFIG_LOOPW=y
+CONFIG_CMD_MD5SUM=y
+CONFIG_MD5SUM_VERIFY=y
+CONFIG_CMD_MEMINFO=y
+CONFIG_CMD_MEM_SEARCH=y
+CONFIG_CMD_MX_CYCLIC=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_CMD_SHA1SUM=y
+CONFIG_SHA1SUM_VERIFY=y
+CONFIG_CMD_STRINGS=y
+CONFIG_CMD_CLK=y
+# CONFIG_CMD_GPIO is not set
+CONFIG_CMD_GPT_RENAME=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_LSBLK=y
+CONFIG_CMD_MBR=y
+CONFIG_CMD_MISC=y
+CONFIG_CMD_BKOPS_ENABLE=y
+CONFIG_CMD_MMC_SWRITE=y
+CONFIG_CMD_CLONE=y
+CONFIG_CMD_READ=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SETEXPR_FMT=y
+CONFIG_BOOTP_DNS2=y
+CONFIG_BOOTP_PREFER_SERVERIP=y
+CONFIG_BOOTP_NTPSERVER=y
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_RARP=y
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_MDIO=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_UUID=y
+CONFIG_CMD_AES=y
+CONFIG_CMD_HASH=y
+CONFIG_HASH_VERIFY=y
+CONFIG_CMD_CBFS=y
+CONFIG_CMD_CRAMFS=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_SQUASHFS=y
+CONFIG_CMD_FS_UUID=y
+CONFIG_CMD_DIAG=y
+CONFIG_CMD_LOG=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_SECT_SIZE_AUTO=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_BOOTP_SEND_HOSTNAME=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_TSIZE=y
+CONFIG_SERVERIP_FROM_PROXYDHCP=y
+CONFIG_SIFIVE_CCACHE_WAYENABLE_OPT=y
+CONFIG_SIFIVE_CCACHE_WAYENABLE_NUM=16
+# CONFIG_CLK is not set
+CONFIG_SYS_I2C_DW=y
+# CONFIG_SYS_I2C_OCORES is not set
+# CONFIG_SIFIVE_OTP is not set
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
+# CONFIG_MMC_BROKEN_CD is not set
+# CONFIG_MMC_SPI is not set
+# CONFIG_MMC_QUIRKS is not set
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MMC_DW=y
+# CONFIG_MTD is not set
+CONFIG_SF_DEFAULT_MODE=0x0
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+# CONFIG_SPI_FLASH_ISSI is not set
+CONFIG_MTD_UBI=y
+CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_ADDR=3
+# CONFIG_PHY_MSCC is not set
+CONFIG_PHY_YUTAI=y
+# CONFIG_DM_ETH is not set
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+# CONFIG_MII is not set
+# CONFIG_DM_PWM is not set
+# CONFIG_RAM_SIFIVE is not set
+CONFIG_SPECIFY_CONSOLE_INDEX=y
+# CONFIG_SIFIVE_SERIAL is not set
+CONFIG_CADENCE_QSPI=y
+# CONFIG_SPI_SIFIVE is not set
+# CONFIG_SYSRESET is not set
+CONFIG_FS_CBFS=y
+# CONFIG_FAT_WRITE is not set
+CONFIG_FS_CRAMFS=y
+# CONFIG_ASYMMETRIC_KEY_TYPE is not set
+CONFIG_ERRNO_STR=y
+# CONFIG_GENERATE_SMBIOS_TABLE is not set
+CONFIG_UNIT_TEST=y
From c204ddb84b3c956ce5ad13cfb4486d9bd598194c Mon Sep 17 00:00:00 2001
From: Wei Fu <wefu@redhat.com>
Date: Tue, 28 Dec 2021 16:44:18 +0800
Subject: [PATCH 3/7] starfive: add ID_EEPROM supoort for visionfive V1
This patch add ID_EEPROM (mac command) support for visionfive V1.
Signed-off-by: Wei Fu <wefu@redhat.com>
---
board/starfive/jh7100/Makefile | 2 +
board/starfive/jh7100/jh7100-i2c-eeprom.c | 734 ++++++++++++++++++
...starfive_jh7100_visionfive_smode_defconfig | 1 +
drivers/misc/Kconfig | 3 +-
include/configs/starfive-jh7100.h | 37 +
5 files changed, 775 insertions(+), 2 deletions(-)
create mode 100644 board/starfive/jh7100/jh7100-i2c-eeprom.c
diff --git a/board/starfive/jh7100/Makefile b/board/starfive/jh7100/Makefile
index 52ebfb022b..14912c01be 100644
--- a/board/starfive/jh7100/Makefile
+++ b/board/starfive/jh7100/Makefile
@@ -5,3 +5,5 @@
obj-y += jh7100.o
obj-y += jh_ptc.o
+
+obj-$(CONFIG_ID_EEPROM) += jh7100-i2c-eeprom.o
diff --git a/board/starfive/jh7100/jh7100-i2c-eeprom.c b/board/starfive/jh7100/jh7100-i2c-eeprom.c
new file mode 100644
index 0000000000..10eb604d8a
--- /dev/null
+++ b/board/starfive/jh7100/jh7100-i2c-eeprom.c
@@ -0,0 +1,734 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2021 Red Hat, Inc. All Rights Reserved.
+ * Written by Wei Fu (wefu@redhat.com)
+ */
+
+
+#include <common.h>
+#include <command.h>
+#include <env.h>
+#include <i2c.h>
+#include <init.h>
+#include <linux/ctype.h>
+#include <linux/delay.h>
+//#include <u-boot/crc.h>
+/*
+ * MAGIC_NUMBER_BYTES: number of bytes used by the magic number
+ */
+#define MAGIC_NUMBER_BYTES 4
+
+/*
+ * SERIAL_NUMBER_BYTES: number of bytes used by the board serial
+ * number
+ */
+//#define SERIAL_NUMBER_BYTES 16
+
+/*
+ * MAC_ADDR_BYTES: number of bytes used by the Ethernet MAC address
+ */
+#define MAC_ADDR_BYTES 6
+
+/*
+ * MAC_ADDR_STRLEN: length of mac address string
+ */
+#define MAC_ADDR_STRLEN 17
+
+/*
+ * Atom Types
+ * 0x0000 = invalid
+ * 0x0001 = vendor info
+ * 0x0002 = GPIO map
+ * 0x0003 = Linux device tree blob
+ * 0x0004 = manufacturer custom data
+ * 0x0005-0xfffe = reserved for future use
+ * 0xffff = invalid
+ */
+
+#define HATS_ATOM_INVALID 0x0000
+#define HATS_ATOM_VENDOR 0x0001
+#define HATS_ATOM_GPIO 0x0002
+#define HATS_ATOM_DTB 0x0003
+#define HATS_ATOM_CUSTOM 0x0004
+#define HATS_ATOM_INVALID_END 0xffff
+
+struct eeprom_hats_header {
+ char signature[MAGIC_NUMBER_BYTES]; /* ASCII table signature */
+ u8 version; /* EEPROM data format version */
+ /* (0x00 reserved, 0x01 = first version) */
+ u8 reversed; /* 0x00, Reserved field */
+ u16 numatoms; /* total atoms in EEPROM */
+ u32 eeplen; /* total length in bytes of all eeprom data */
+ /* (including this header) */
+};
+
+struct eeprom_hats_atom_header {
+ u16 type;
+ u16 count;
+ u32 dlen;
+};
+
+/**
+ * static eeprom: EEPROM layout for the StarFive platform I2C format
+ */
+struct starfive_eeprom_atom1_data {
+ u8 uuid[16];
+ u16 pid;
+ u16 pver;
+ u8 vslen;
+ u8 pslen;
+ uchar vstr[CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE];
+ uchar pstr[CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE]; /* product SN */
+};
+
+struct starfive_eeprom_atom1 {
+ struct eeprom_hats_atom_header header;
+ struct starfive_eeprom_atom1_data data;
+ u16 crc16;
+};
+
+struct starfive_eeprom_atom4_v1_data {
+ u16 version;
+ u8 pcb_revision; /* PCB version */
+ u8 bom_revision; /* BOM version */
+ u8 mac_addr[MAC_ADDR_BYTES]; /* Ethernet0 MAC */
+};
+
+struct starfive_eeprom_atom4_v1 {
+ struct eeprom_hats_atom_header header;
+ struct starfive_eeprom_atom4_v1_data data;
+ u16 crc16;
+};
+
+/* Set to 1 if we've read EEPROM into memory
+ * Set to -1 if EEPROM data is wrong
+ */
+static int has_been_read;
+
+/**
+ * helper struct for getting info from the local EEPROM copy.
+ * most of the items are pointers to the eeprom_wp_buff.
+ * ONLY serialnum is the u32 from the last 8 Bytes of product string
+ */
+struct starfive_eeprom_info {
+ char *vstr; /* Vendor string in ATOM1 */
+ char *pstr; /* product string in ATOM1 */
+ u32 serialnum; /* serial number from in product string*/
+ u16 *version; /* custom data version in ATOM4 */
+ u8 *pcb_revision; /* PCB version in ATOM4 */
+ u8 *bom_revision; /* BOM version in ATOM4 */
+ u8 *mac_addr; /* Ethernet0 MAC in ATOM4 */
+};
+static struct starfive_eeprom_info einfo;
+
+
+static uchar eeprom_wp_buff[CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX];
+static struct eeprom_hats_header starfive_eeprom_hats_header_default = {
+ .signature = STARFIVE_EEPROM_HATS_SIG,
+ .version = FORMAT_VERSION,
+ .numatoms = 2,
+ .eeplen = sizeof(struct eeprom_hats_header) +
+ sizeof(struct starfive_eeprom_atom1) +
+ sizeof(struct starfive_eeprom_atom4_v1)
+};
+static struct starfive_eeprom_atom1 starfive_eeprom_atom1_default = {
+ .header = {
+ .type = HATS_ATOM_VENDOR,
+ .count = 1,
+ .dlen = sizeof(struct starfive_eeprom_atom1_data) + sizeof(u16)
+ },
+ .data = {
+ .uuid = {0},
+ .pid = 0,
+ .pver = 0,
+ .vslen = CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE,
+ .pslen = CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE,
+ .vstr = CONFIG_STARFIVE_EEPROM_ATOM1_VSTR,
+ .pstr = CONFIG_STARFIVE_EEPROM_ATOM1_PSTR
+ }
+};
+static struct starfive_eeprom_atom4_v1 starfive_eeprom_atom4_v1_default = {
+ .header = {
+ .type = HATS_ATOM_CUSTOM,
+ .count = 2,
+ .dlen = sizeof(struct starfive_eeprom_atom4_v1_data) + sizeof(u16)
+ },
+ .data = {
+ .version = FORMAT_VERSION,
+ .pcb_revision = PCB_VERSION,
+ .bom_revision = BOM_VERSION,
+ .mac_addr = STARFIVE_DEFAULT_MAC
+ }
+};
+
+//static u8 starfive_default_mac[MAC_ADDR_BYTES] = STARFIVE_DEFAULT_MAC;
+
+/**
+ * is_match_magic() - Does the magic number match that of a StarFive EEPROM?
+ *
+ * @hats: the pointer of eeprom_hats_header
+ * Return: status code, 0: Yes, non-0: NO
+ */
+static inline int is_match_magic(char *hats)
+{
+ return strncmp(hats, STARFIVE_EEPROM_HATS_SIG, MAGIC_NUMBER_BYTES);
+}
+
+/**
+ * calculate_crc16() - Calculate the current CRC for atom
+ * Porting from https://github.com/raspberrypi/hats, getcrc
+ * @data: the pointer of eeprom_hats_atom_header
+ * @size: total length in bytes of the entire atom
+ * (type, count, dlen, data)
+ * Return: result: crc16 code
+ */
+#define CRC16 0x8005
+static u16 calculate_crc16(uchar* data, unsigned int size)
+{
+ int i, j = 0x0001;
+ u16 out = 0, crc = 0;
+ int bits_read = 0, bit_flag;
+
+ /* Sanity check: */
+ if((data == NULL) || size == 0)
+ return 0;
+
+ while(size > 0) {
+ bit_flag = out >> 15;
+
+ /* Get next bit: */
+ out <<= 1;
+ // item a) work from the least significant bits
+ out |= (*data >> bits_read) & 1;
+
+ /* Increment bit counter: */
+ bits_read++;
+ if(bits_read > 7) {
+ bits_read = 0;
+ data++;
+ size--;
+ }
+
+ /* Cycle check: */
+ if(bit_flag)
+ out ^= CRC16;
+ }
+
+ // item b) "push out" the last 16 bits
+ for (i = 0; i < 16; ++i) {
+ bit_flag = out >> 15;
+ out <<= 1;
+ if(bit_flag)
+ out ^= CRC16;
+ }
+
+ // item c) reverse the bits
+ for (i = 0x8000; i != 0; i >>=1, j <<= 1) {
+ if (i & out)
+ crc |= j;
+ }
+
+ return crc;
+}
+
+/* This function should be called after each update to any EEPROM ATOM */
+static inline void update_crc(struct eeprom_hats_atom_header *atom)
+{
+ uint atom_crc_offset = sizeof(struct eeprom_hats_atom_header) +
+ atom->dlen - sizeof(u16);
+ u16 *atom_crc_p = (void *) atom + atom_crc_offset;
+ *atom_crc_p = calculate_crc16((uchar*) atom, atom_crc_offset);
+}
+
+/**
+ * dump_raw_eeprom - display the raw contents of the EEPROM
+ */
+static void dump_raw_eeprom(u8 *e, unsigned int size)
+{
+ unsigned int i;
+
+ printf("EEPROM dump: (0x%x bytes)\n", size);
+
+ for (i = 0; i < size; i++) {
+ if (!(i % 0x10))
+ printf("%02X: ", i);
+
+ printf("%02X ", e[i]);
+
+ if (((i % 16) == 15) || (i == size - 1))
+ printf("\n");
+ }
+
+ return;
+}
+
+static int hats_atom_crc_check(struct eeprom_hats_atom_header *atom)
+{
+ u16 atom_crc, data_crc;
+ uint atom_crc_offset = sizeof(struct eeprom_hats_atom_header) +
+ atom->dlen - sizeof(atom_crc);
+ u16 *atom_crc_p = (void *) atom + atom_crc_offset;
+
+ atom_crc = *atom_crc_p;
+ data_crc = calculate_crc16((uchar *) atom, atom_crc_offset);
+ if (atom_crc == data_crc)
+ return 0;
+
+ printf("EEPROM HATs: CRC ERROR in atom %x type %x, (%x!=%x)\n",
+ atom->count, atom->type, atom_crc, data_crc);
+ return -1;
+}
+
+static void *hats_get_atom(struct eeprom_hats_header *header, u16 type)
+ {
+ struct eeprom_hats_atom_header *atom;
+ void *hats_eeprom_max = (void *)header + header->eeplen;
+ void *temp = (void *)header + sizeof(struct eeprom_hats_header);
+
+ for (int numatoms = (int)header->numatoms; numatoms > 0; numatoms--) {
+ atom = (struct eeprom_hats_atom_header *)temp;
+ if (hats_atom_crc_check(atom))
+ return NULL;
+ if (atom->type == type)
+ return (void *)atom;
+ /* go to next atom */
+ temp = (void *)atom + sizeof(struct eeprom_hats_atom_header) +
+ atom->dlen;
+ if (temp > hats_eeprom_max) {
+ printf("EEPROM HATs: table overflow next@%p, max@%p\n",
+ temp, hats_eeprom_max);
+ break;
+ }
+ }
+
+ /* fail to get atom */
+ return NULL;
+}
+
+/**
+ * show_eeprom - display the contents of the EEPROM
+ */
+static void show_eeprom(struct starfive_eeprom_info *einfo)
+{
+ printf("\n--------EEPROM INFO--------\n");
+ printf("Vendor : %s\n", einfo->vstr);
+ printf("Product full SN: %s\n", einfo->pstr);
+ printf("data version: 0x%x\n", *einfo->version);
+ if (1 == *einfo->version) {
+ printf("PCB revision: 0x%x\n", *einfo->pcb_revision);
+ printf("BOM revision: %c\n", *einfo->bom_revision);
+ printf("Ethernet MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
+ einfo->mac_addr[0], einfo->mac_addr[1],
+ einfo->mac_addr[2], einfo->mac_addr[3],
+ einfo->mac_addr[4], einfo->mac_addr[5]);
+ } else {
+ printf("Custom data v%d is not Supported\n", *einfo->version);
+ }
+ printf("--------EEPROM INFO--------\n\n");
+}
+
+/**
+ * parse_eeprom_info - parse the contents of the EEPROM
+ * If everthing gose right,
+ * 1, set has_been_read to 1
+ * 2, display info
+ *
+ * If anything goes wrong,
+ * 1, set has_been_read to -1
+ * 2, dump data by hex for debug
+ *
+ * @buf: the pointer of eeprom_hats_header in memory
+ * Return: status code, 0: Success, non-0: Fail
+ *
+ */
+static int parse_eeprom_info(struct eeprom_hats_header *buf)
+{
+ struct eeprom_hats_atom_header *atom;
+ void *atom_data;
+ struct starfive_eeprom_atom1_data *atom1 = NULL;
+ struct starfive_eeprom_atom4_v1_data *atom4_v1 = NULL;
+
+ if (is_match_magic((char *)buf)) {
+ printf("Not a StarFive EEPROM data format - magic error\n");
+ goto error;
+ };
+
+ printf("StarFive EEPROM format v%u\n", buf->version);
+
+ // parse atom1(verdor)
+ atom = (struct eeprom_hats_atom_header *)
+ hats_get_atom(buf, HATS_ATOM_VENDOR);
+ if (atom) {
+ atom_data = (void *)atom +
+ sizeof(struct eeprom_hats_atom_header);
+ atom1 = (struct starfive_eeprom_atom1_data *)atom_data;
+ einfo.vstr = atom1->vstr;
+ einfo.pstr = atom1->pstr;
+ einfo.serialnum = (u32)hextoul((void *)atom1->pstr +
+ CONFIG_STARFIVE_EEPROM_ATOM1_SN_OFFSET,
+ NULL);
+ } else {
+ printf("fail to get vendor atom\n");
+ goto error;
+ };
+
+ // parse atom4(custom)
+ atom = (struct eeprom_hats_atom_header *)
+ hats_get_atom(buf, HATS_ATOM_CUSTOM);
+ if (atom) {
+ atom_data = (void *)atom +
+ sizeof(struct eeprom_hats_atom_header);
+ atom4_v1 = (struct starfive_eeprom_atom4_v1_data *)atom_data;
+ einfo.version = &atom4_v1->version;
+ if (*einfo.version == 1) {
+ einfo.pcb_revision = &atom4_v1->pcb_revision;
+ einfo.bom_revision = &atom4_v1->bom_revision;
+ einfo.mac_addr = atom4_v1->mac_addr;
+ }
+ } else {
+ printf("fail to get custom data atom\n");
+ goto error;
+ };
+
+ // everthing gose right
+ has_been_read = 1;
+ show_eeprom(&einfo);
+ return 0;
+
+error:
+ has_been_read = -1;
+ dump_raw_eeprom(eeprom_wp_buff,
+ CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ return -1;
+}
+
+/**
+ * read_eeprom() - read the EEPROM into memory, if it hasn't been read yet
+ * @buf: the pointer of eeprom data buff
+ * Return: status code, 0: Success, non-0: Fail
+ * Note: depend on CONFIG_SYS_EEPROM_BUS_NUM
+ * CONFIG_SYS_I2C_EEPROM_ADDR
+ * CONFIG_STARFIVE_EEPROM_WP_OFFSET
+ * CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX
+ */
+static int read_eeprom(uint8_t *buf)
+{
+ int ret;
+ struct udevice *dev;
+
+ if (has_been_read == 1)
+ return 0;
+
+ ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
+ CONFIG_SYS_I2C_EEPROM_ADDR,
+ CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
+ &dev);
+ if (!ret) {
+ ret = dm_i2c_read(dev, CONFIG_STARFIVE_EEPROM_WP_OFFSET,
+ buf, CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ }
+
+ if (ret) {
+ printf("fail to read EEPROM.\n");
+ return ret;
+ }
+
+ return parse_eeprom_info((struct eeprom_hats_header *)buf);
+}
+
+/**
+ * prog_eeprom() - write the EEPROM from memory
+ */
+static int prog_eeprom(uint8_t *buf, unsigned int size)
+{
+ unsigned int i;
+ void *p;
+ uchar tmp_buff[CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX];
+ struct udevice *dev;
+ int ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
+ CONFIG_SYS_I2C_EEPROM_ADDR,
+ CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
+ &dev);
+
+ if (is_match_magic(buf)) {
+ printf("MAGIC ERROR, Please check the data@%p.\n", buf);
+ return -1;
+ }
+
+ for (i = 0, p = buf; i < size;
+ i += BYTES_PER_EEPROM_PAGE, p += BYTES_PER_EEPROM_PAGE) {
+ if (!ret)
+ ret = dm_i2c_write(dev,
+ i + CONFIG_STARFIVE_EEPROM_WP_OFFSET,
+ p, min((int)(size - i),
+ BYTES_PER_EEPROM_PAGE));
+ if (ret)
+ break;
+ udelay(EEPROM_WRITE_DELAY_MS);
+ }
+
+ if (!ret) {
+ /* Verify the write by reading back the EEPROM and comparing */
+ ret = dm_i2c_read(dev,
+ CONFIG_STARFIVE_EEPROM_WP_OFFSET,
+ tmp_buff,
+ CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ if (!ret && memcmp((void *)buf, (void *)tmp_buff,
+ CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX))
+ ret = -1;
+ }
+
+ if (ret) {
+ has_been_read = -1;
+ printf("Programming failed.Temp buff:\n");
+ dump_raw_eeprom(tmp_buff,
+ CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ return -1;
+ }
+
+ printf("Programming passed.\n");
+ return 0;
+}
+
+/**
+ * set_mac_address() - stores a MAC address into the local EEPROM copy
+ *
+ * This function takes a pointer to MAC address string
+ * (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number),
+ * stores it in the MAC address field of the EEPROM local copy, and
+ * updates the local copy of the CRC.
+ */
+static void set_mac_address(char *string)
+{
+ unsigned int i;
+ struct eeprom_hats_atom_header *atom4;
+ atom4 = (struct eeprom_hats_atom_header *)
+ hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
+ HATS_ATOM_CUSTOM);
+
+ if (strncasecmp(STARFIVE_OUI_PREFIX, string,
+ strlen(STARFIVE_OUI_PREFIX))) {
+ printf("The MAC address doesn't match StarFive OUI %s\n",
+ STARFIVE_OUI_PREFIX);
+ return;
+ }
+
+ for (i = 0; *string && (i < MAC_ADDR_BYTES); i++) {
+ einfo.mac_addr[i] = hextoul(string, &string);
+ if (*string == ':')
+ string++;
+ }
+
+ update_crc(atom4);
+}
+
+/**
+ * set_pcb_revision() - stores a StarFive PCB revision into the local EEPROM copy
+ *
+ * Takes a pointer to a string representing the numeric PCB revision in
+ * decimal ("0" - "255"), stores it in the pcb_revision field of the
+ * EEPROM local copy, and updates the CRC of the local copy.
+ */
+static void set_pcb_revision(char *string)
+{
+ u8 p;
+ uint base = 16;
+ struct eeprom_hats_atom_header *atom4;
+ atom4 = (struct eeprom_hats_atom_header *)
+ hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
+ HATS_ATOM_CUSTOM);
+
+ p = (u8)simple_strtoul(string, NULL, base);
+ if (p > U8_MAX) {
+ printf("%s must not be greater than %d\n", "PCB revision",
+ U8_MAX);
+ return;
+ }
+
+ *einfo.pcb_revision = p;
+
+ update_crc(atom4);
+}
+
+/**
+ * set_bom_revision() - stores a StarFive BOM revision into the local EEPROM copy
+ *
+ * Takes a pointer to a uppercase ASCII character representing the BOM
+ * revision ("A" - "Z"), stores it in the bom_revision field of the
+ * EEPROM local copy, and updates the CRC of the local copy.
+ */
+static void set_bom_revision(char *string)
+{
+ struct eeprom_hats_atom_header *atom4;
+ atom4 = (struct eeprom_hats_atom_header *)
+ hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
+ HATS_ATOM_CUSTOM);
+
+ if (string[0] < 'A' || string[0] > 'Z') {
+ printf("BOM revision must be an uppercase letter between A and Z\n");
+ return;
+ }
+
+ *einfo.bom_revision = string[0];
+
+ update_crc(atom4);
+}
+
+/**
+ * set_product_id() - stores a StarFive product ID into the local EEPROM copy
+ *
+ * Takes a pointer to a string representing the numeric product ID in
+ * string ("VF7100A1-2150-D008E000-00000001\0"), stores it in the product string
+ * field of the EEPROM local copy, and updates the CRC of the local copy.
+ */
+static void set_product_id(char *string)
+{
+ struct eeprom_hats_atom_header *atom1;
+ atom1 = (struct eeprom_hats_atom_header *)
+ hats_get_atom((struct eeprom_hats_header *)eeprom_wp_buff,
+ HATS_ATOM_VENDOR);
+
+ memcpy((void *)einfo.pstr, (void *)string,
+ CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE);
+
+ update_crc(atom1);
+}
+
+/**
+ * init_local_copy() - initialize the in-memory EEPROM copy
+ *
+ * Initialize the in-memory EEPROM copy with the magic number. Must
+ * be done when preparing to initialize a blank EEPROM, or overwrite
+ * one with a corrupted magic number.
+ */
+static void init_local_copy(uchar *buff)
+{
+ struct eeprom_hats_header *hats = (struct eeprom_hats_header *)buff;
+ struct eeprom_hats_atom_header *atom1 = (void *)hats +
+ sizeof(struct eeprom_hats_header);
+ struct eeprom_hats_atom_header *atom4_v1 = (void *)atom1 +
+ sizeof(struct starfive_eeprom_atom1);
+
+ memcpy((void *)hats, (void *)&starfive_eeprom_hats_header_default,
+ sizeof(struct eeprom_hats_header));
+ memcpy((void *)atom1, (void *)&starfive_eeprom_atom1_default,
+ sizeof(struct starfive_eeprom_atom1));
+ memcpy((void *)atom4_v1, (void *)&starfive_eeprom_atom4_v1_default,
+ sizeof(struct starfive_eeprom_atom4_v1));
+
+ update_crc(atom1);
+ update_crc(atom4_v1);
+}
+
+static int print_usage(void)
+{
+ printf("display and program the system ID and MAC addresses in EEPROM\n"
+ "[read_eeprom|initialize|write_eeprom|mac_address|pcb_revision|bom_revision|product_id]\n"
+ "mac read_eeprom\n"
+ " - read EEPROM content into memory data structure\n"
+ "mac write_eeprom\n"
+ " - save memory data structure to the EEPROM\n"
+ "mac initialize\n"
+ " - initialize the in-memory EEPROM copy with default data\n"
+ "mac mac_address <xx:xx:xx:xx:xx:xx>\n"
+ " - stores a MAC address into the local EEPROM copy\n"
+ "mac pcb_revision <?>\n"
+ " - stores a StarFive PCB revision into the local EEPROM copy\n"
+ "mac bom_revision <A>\n"
+ " - stores a StarFive BOM revision into the local EEPROM copy\n"
+ "mac product_id <VF7100A1-2150-D008E000-xxxxxxxx>\n"
+ " - stores a StarFive product ID into the local EEPROM copy\n");
+ return 0;
+}
+
+int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ char *cmd;
+
+ if (argc == 1) {
+ show_eeprom(&einfo);
+ return 0;
+ }
+
+ if (argc > 3)
+ return print_usage();
+
+ cmd = argv[1];
+
+ /* Commands with no argument */
+ if (!strcmp(cmd, "read_eeprom")) {
+ has_been_read = 0;
+ return read_eeprom(eeprom_wp_buff);
+ } else if (!strcmp(cmd, "initialize")) {
+ init_local_copy(eeprom_wp_buff);
+ return 0;
+ } else if (!strcmp(cmd, "write_eeprom")) {
+ return prog_eeprom(eeprom_wp_buff,
+ CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ }
+
+ if (argc != 3)
+ return print_usage();
+
+ if (is_match_magic(eeprom_wp_buff)) {
+ printf("Please read the EEPROM ('read_eeprom') and/or initialize the EEPROM ('initialize') first.\n");
+ return 0;
+ }
+
+ if (!strcmp(cmd, "mac_address")) {
+ set_mac_address(argv[2]);
+ return 0;
+ } else if (!strcmp(cmd, "pcb_revision")) {
+ set_pcb_revision(argv[2]);
+ return 0;
+ } else if (!strcmp(cmd, "bom_revision")) {
+ set_bom_revision(argv[2]);
+ return 0;
+ } else if (!strcmp(cmd, "product_id")) {
+ set_product_id(argv[2]);
+ return 0;
+ }
+
+ return print_usage();
+}
+
+/**
+ * mac_read_from_eeprom() - read the MAC address & the serial number in EEPROM
+ *
+ * This function reads the MAC address and the serial number from EEPROM and
+ * sets the appropriate environment variables for each one read.
+ *
+ * The environment variables are only set if they haven't been set already.
+ * This ensures that any user-saved variables are never overwritten.
+ *
+ * If CONFIG_ID_EEPROM is enabled, this function will be called in
+ * "static init_fnc_t init_sequence_r[]" of u-boot/common/board_r.c.
+ */
+int mac_read_from_eeprom(void)
+{
+ /**
+ * try to fill the buff from EEPROM,
+ * always return SUCCESS, even some error happens.
+ */
+ if (read_eeprom(eeprom_wp_buff))
+ return 0;
+
+ // 1, setup ethaddr env
+ eth_env_set_enetaddr("ethaddr", einfo.mac_addr);
+
+ /**
+ * 2, setup serial# env, reference to hifive-platform-i2c-eeprom.c,
+ * serial# can be a ASCII string, but not just a hex number, so we
+ * setup serial# in the 32Byte format:
+ * "VF7100A1-2201-D008E000-00000001;"
+ * "<product>-<date>-<DDR&eMMC>-<serial_number>"
+ * <date>: 4Byte, should be the output of `date +%y%W`
+ * <DDR&eMMC>: 8Byte, "D008" means 8GB, "D01T" means 1TB;
+ * "E000" means no eMMC，"E032" means 32GB, "E01T" means 1TB.
+ * <serial_number>: 8Byte, the Unique Identifier of board in hex.
+ */
+ if (!env_get("serial#"))
+ env_set("serial#", einfo.pstr);
+
+ return 0;
+}
\ No newline at end of file
diff --git a/configs/starfive_jh7100_visionfive_smode_defconfig b/configs/starfive_jh7100_visionfive_smode_defconfig
index 5092991653..4d49db8990 100644
--- a/configs/starfive_jh7100_visionfive_smode_defconfig
+++ b/configs/starfive_jh7100_visionfive_smode_defconfig
@@ -40,6 +40,7 @@ CONFIG_LOG_ERROR_RETURN=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SYS_PROMPT="VisionFive #"
CONFIG_CMD_CONFIG=y
CONFIG_CMD_LICENSE=y
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 2f45f1e72c..047da21a48 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -77,8 +77,7 @@ config SIFIVE_OTP
config STARFIVE_OTP
bool "StarFive eMemory OTP driver"
- depends on MISC && JH_STARLIGHT
- default y if JH_STARLIGHT
+ depends on MISC && JH_STARLIGHT && !ID_EEPROM
help
Enable support for reading and writing the eMemory OTP on the
StarFive SoCs.
diff --git a/include/configs/starfive-jh7100.h b/include/configs/starfive-jh7100.h
index 71c311eaaf..e97f0f5fdd 100755
--- a/include/configs/starfive-jh7100.h
+++ b/include/configs/starfive-jh7100.h
@@ -100,4 +100,41 @@
#define CONFIG_CQSPI_REF_CLK (250000000)
#endif
+#ifdef CONFIG_ID_EEPROM /* EEPROM for SN and MAC */
+#define CONFIG_SYS_EEPROM_BUS_NUM 0
+
+#define FORMAT_VERSION 0x1
+#define PCB_VERSION 0x1
+#define BOM_VERSION 'A'
+/*
+ * BYTES_PER_EEPROM_PAGE: the 24FC04H datasheet says that data can
+ * only be written in page mode, which means 16 bytes at a time:
+ * 16-Byte Page Write Buffer
+ */
+#define BYTES_PER_EEPROM_PAGE 16
+
+/*
+ * EEPROM_WRITE_DELAY_MS: the 24FC04H datasheet says it takes up to
+ * 5ms to complete a given write:
+ * Write Cycle Time (byte or page) ro Page Write Time 5 ms, Maximum
+ */
+#define EEPROM_WRITE_DELAY_MS 5000
+/*
+ * StarFive OUI. Registration Date is 20xx-xx-xx
+ */
+#define STARFIVE_OUI_PREFIX "6C:CF:39:"
+#define STARFIVE_DEFAULT_MAC {0x6C, 0xCF, 0x39, 0x08, 0x08, 0x08}
+
+/* Magic number at the first four bytes of EEPROM HATs */
+#define STARFIVE_EEPROM_HATS_SIG "SFVF" /* StarFive VisionFive */
+
+#define CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX 128 /* Header + Atom1&4(v1) */
+#define CONFIG_STARFIVE_EEPROM_WP_OFFSET 256 /* Read only field */
+#define CONFIG_STARFIVE_EEPROM_ATOM1_PSTR "VF7100A1-2201-D008E000-00000001\0"
+#define CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE 32
+#define CONFIG_STARFIVE_EEPROM_ATOM1_SN_OFFSET 23
+#define CONFIG_STARFIVE_EEPROM_ATOM1_VSTR "StarFive Technology Co., Ltd.\0\0\0"
+#define CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE 32
+#endif
+
#endif /* __CONFIG_H */
From 4620e2cb54259acfd4964111400f48447830111c Mon Sep 17 00:00:00 2001
From: Tom Rini <trini@konsulko.com>
Date: Tue, 17 Aug 2021 17:59:41 -0400
Subject: [PATCH 4/7] Convert CONFIG_ID_EEPROM to Kconfig
This converts the following to Kconfig:
CONFIG_ID_EEPROM
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 +++++
arch/powerpc/cpu/mpc85xx/Kconfig | 1 +
common/Kconfig | 6 ++++++
common/board_r.c | 2 +-
configs/MPC8548CDS_36BIT_defconfig | 1 +
configs/MPC8548CDS_defconfig | 1 +
configs/MPC8548CDS_legacy_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PB_NAND_defconfig | 1 +
configs/P1010RDB-PB_NOR_defconfig | 1 +
configs/P1010RDB-PB_SDCARD_defconfig | 1 +
configs/P1010RDB-PB_SPIFLASH_defconfig | 1 +
configs/P2041RDB_NAND_defconfig | 1 +
configs/P2041RDB_SDCARD_defconfig | 1 +
configs/P2041RDB_SPIFLASH_defconfig | 1 +
configs/P2041RDB_defconfig | 1 +
configs/P3041DS_NAND_defconfig | 1 +
configs/P3041DS_SDCARD_defconfig | 1 +
configs/P3041DS_SPIFLASH_defconfig | 1 +
configs/P3041DS_defconfig | 1 +
configs/P4080DS_SDCARD_defconfig | 1 +
configs/P4080DS_SPIFLASH_defconfig | 1 +
configs/P4080DS_defconfig | 1 +
configs/P5040DS_NAND_defconfig | 1 +
configs/P5040DS_SDCARD_defconfig | 1 +
configs/P5040DS_SPIFLASH_defconfig | 1 +
configs/P5040DS_defconfig | 1 +
configs/T1024RDB_NAND_defconfig | 1 +
configs/T1024RDB_SDCARD_defconfig | 1 +
configs/T1024RDB_SPIFLASH_defconfig | 1 +
configs/T1024RDB_defconfig | 1 +
configs/ls1012aqds_qspi_defconfig | 1 +
configs/ls1012aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1012aqds_tfa_defconfig | 1 +
configs/ls1021aiot_qspi_defconfig | 1 +
configs/ls1021aiot_sdcard_defconfig | 1 +
configs/ls1021aqds_ddr4_nor_defconfig | 1 +
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 +
configs/ls1021aqds_nand_defconfig | 1 +
configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 +
configs/ls1021aqds_nor_defconfig | 1 +
configs/ls1021aqds_nor_lpuart_defconfig | 1 +
configs/ls1021aqds_qspi_defconfig | 1 +
configs/ls1021aqds_sdcard_ifc_defconfig | 1 +
configs/ls1021aqds_sdcard_qspi_defconfig | 1 +
configs/ls1021atsn_qspi_defconfig | 1 +
configs/ls1021atsn_sdcard_defconfig | 1 +
configs/ls1021atwr_nor_SECURE_BOOT_defconfig | 1 +
configs/ls1021atwr_nor_defconfig | 1 +
configs/ls1021atwr_nor_lpuart_defconfig | 1 +
configs/ls1021atwr_qspi_defconfig | 1 +
configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 +
configs/ls1021atwr_sdcard_ifc_defconfig | 1 +
configs/ls1021atwr_sdcard_qspi_defconfig | 1 +
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1028aqds_tfa_defconfig | 1 +
configs/ls1028aqds_tfa_lpuart_defconfig | 1 +
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1028ardb_tfa_defconfig | 1 +
configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2162aqds_tfa_defconfig | 1 +
configs/lx2162aqds_tfa_verified_boot_defconfig | 1 +
configs/sifive_unmatched_defconfig | 1 +
include/configs/MPC8548CDS.h | 1 -
include/configs/P1010RDB.h | 1 -
include/configs/P2041RDB.h | 1 -
include/configs/T102xRDB.h | 1 -
include/configs/T208xQDS.h | 1 -
include/configs/T208xRDB.h | 1 -
include/configs/corenet_ds.h | 1 -
include/configs/ls1012aqds.h | 1 -
include/configs/ls1021aiot.h | 1 -
include/configs/ls1021aqds.h | 1 -
include/configs/ls1021atsn.h | 1 -
include/configs/ls1021atwr.h | 1 -
include/configs/ls1028a_common.h | 1 -
include/configs/ls1043aqds.h | 1 -
include/configs/ls1043ardb.h | 1 -
include/configs/ls1046afrwy.h | 1 -
include/configs/ls1046aqds.h | 1 -
include/configs/ls1046ardb.h | 1 -
include/configs/ls1088aqds.h | 1 -
include/configs/ls1088ardb.h | 1 -
include/configs/ls2080aqds.h | 1 -
include/configs/ls2080ardb.h | 1 -
include/configs/lx2160a_common.h | 1 -
include/configs/lx2160aqds.h | 1 -
include/configs/lx2160ardb.h | 1 -
include/configs/lx2162aqds.h | 1 -
include/configs/p1_p2_rdb_pc.h | 1 -
include/configs/sifive-unmatched.h | 2 --
scripts/config_whitelist.txt | 1 -
95 files changed, 75 insertions(+), 31 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9cef363fba..a1e1a2699b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -84,6 +84,7 @@ config ARCH_LS1043A
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply CMD_PCI
+ imply ID_EEPROM
config ARCH_LS1046A
bool
@@ -117,6 +118,7 @@ config ARCH_LS1046A
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
+ imply ID_EEPROM
imply SCSI
imply SCSI_AHCI
@@ -158,6 +160,7 @@ config ARCH_LS1088A
select SYS_I2C_MXC_I2C3 if !TFABOOT
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
+ imply ID_EEPROM
imply SCSI
imply PANIC_HANG
@@ -210,6 +213,7 @@ config ARCH_LS2080A
select SYS_I2C_MXC_I2C4 if !TFABOOT
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
+ imply ID_EEPROM
imply PANIC_HANG
config ARCH_LX2162A
@@ -272,6 +276,7 @@ config ARCH_LX2160A
select SYS_I2C_MXC
select RESV_RAM if GIC_V3_ITS
imply DISTRO_DEFAULTS
+ imply ID_EEPROM
imply PANIC_HANG
imply SCSI
imply SCSI_AHCI
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 66ebaf529f..c4aec7d803 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -718,6 +718,7 @@ config ARCH_T2080
imply CMD_NAND
imply CMD_REGINFO
imply FSL_SATA
+ imply ID_EEPROM
config ARCH_T4240
bool
diff --git a/common/Kconfig b/common/Kconfig
index ee14d3ad5b..1e333c9c36 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -548,6 +548,12 @@ config MISC_INIT_R
help
Enabling this option calls 'misc_init_r' function
+config ID_EEPROM
+ bool "Enable I2C connected system identifier EEPROM"
+ help
+ A number of different systems and vendors enable a vendor-specified
+ EEPROM that contains various identifying features.
+
config PCI_INIT_R
bool "Enumerate PCI buses during init"
depends on PCI
diff --git a/common/board_r.c b/common/board_r.c
index 630c2451a2..0cbe5f7f3d 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -720,7 +720,7 @@ static init_fnc_t init_sequence_r[] = {
#endif
INIT_FUNC_WATCHDOG_RESET
cpu_secondary_init_r,
-#if defined(CONFIG_ID_EEPROM) || defined(CONFIG_SYS_I2C_MAC_OFFSET)
+#if defined(CONFIG_ID_EEPROM)
mac_read_from_eeprom,
#endif
INIT_FUNC_WATCHDOG_RESET
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 72ec1e0f77..630c6c3d45 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -12,6 +12,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 9db54768fb..cfab8901ad 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -11,6 +11,7 @@ CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 83f7382e91..c38064d052 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -12,6 +12,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_SYS_EXTRA_OPTIONS="LEGACY"
CONFIG_BOOTDELAY=10
# CONFIG_MISC_INIT_R is not set
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index ce16c196bd..b5aa8d7cae 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 8f14918103..9f28249448 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -15,6 +15,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 967d7af0ba..9e2c1627dc 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 2d3154e72c..3fa228e2a8 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -24,6 +24,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 1d4d0fe9ae..71503f3406 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_NAND_SUPPORT=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index a1c6fbf4d4..e5dd4f3634 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_I2C=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index f1b19f0415..51a99a2b99 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 261c120607..b661a14bbe 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=10
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 40d4c78a69..c605966c9e 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 55766d1efe..26f14b2920 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 1e0711e9c3..1379aaf5c4 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 224ae422d1..8691ebb500 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 20ab931d3e..69df0fadc2 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 87ed18dc51..d44423d22a 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 48ca8b731d..8de6c6c93c 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 4369f404a5..f954ddcfec 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index 97ef317b07..b3b1da33a9 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 6447124c6e..a59c9716d6 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index f6c43bcd29..283c969997 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 1a55f498b9..9f1e2a0d6c 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 85c8da1537..b3927ebd33 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -14,6 +14,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 48020df78c..0a9d67fc4c 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -15,6 +15,7 @@ CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH"
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 2be7c7769e..098f568488 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -13,6 +13,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 0a3cc7b4cc..2eb7e5b8bf 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -25,6 +25,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_NAND_BOOT=y
CONFIG_SPL_FSL_PBL=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 814cde6e4e..1806fbb8b9 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -24,6 +24,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_MMC_BOOT=y
CONFIG_SPL_FSL_PBL=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 825d9102c3..889a484913 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -26,6 +26,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
# CONFIG_SPL_FRAMEWORK is not set
CONFIG_SPL_SPI_BOOT=y
CONFIG_SPL_FSL_PBL=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 3533b78ba2..be4c244d82 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -17,6 +17,7 @@ CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index 2124716d77..b27d448cf3 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
index ec92358b00..9dc2fe844f 100644
--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
@@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig
index 82a698f6e3..8876c35a84 100644
--- a/configs/ls1012aqds_tfa_defconfig
+++ b/configs/ls1012aqds_tfa_defconfig
@@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
index 131026ca4d..450964fc8b 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -11,6 +11,7 @@ CONFIG_AHCI=y
CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 7c198988b8..9aa65c5e56 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -13,6 +13,7 @@ CONFIG_AHCI=y
CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index cf64f0fc76..7f3af9a22e 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index cb63fb65e8..af8d8fc132 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 072a1e6c73..f730bb150c 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -26,6 +26,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index e9d29f4314..71b949c916 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 4c4050a403..9ff38ce0f2 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 3378fc1e78..3f992b0281 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -19,6 +19,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 69a02a4af9..2219a6f3a8 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 50ba009d70..ceb38a7ae3 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 0c74e9b513..080b4ba7cc 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -25,6 +25,7 @@ CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig
index 6103ab32a4..0cb31fea32 100644
--- a/configs/ls1021atsn_qspi_defconfig
+++ b/configs/ls1021atsn_qspi_defconfig
@@ -17,6 +17,7 @@ CONFIG_QSPI_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index 8cc0360ae7..df5651d034 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -22,6 +22,7 @@ CONFIG_SD_BOOT=y
CONFIG_BOOTDELAY=3
CONFIG_SILENT_CONSOLE=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index d2d2fcc1ba..7f900a5424 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -21,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index fa20ee8c0e..03c7d88e56 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -20,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index 11d210846c..59ba216ed3 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -22,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 50337a874f..aefe442ec9 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -24,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
CONFIG_CMD_MEMTEST=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 106f8ecad5..e7047363b7 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -27,6 +27,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 67b83b7739..613e2c06ef 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -28,6 +28,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index c82c29781a..cc3127b1df 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -28,6 +28,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
CONFIG_SILENT_CONSOLE=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 5b60c4af8d..a61120cd45 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 311cfe3c7a..2d32ff8d68 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
index 6805f5eaaa..1127df3b72 100644
--- a/configs/ls1028aqds_tfa_lpuart_defconfig
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -23,6 +23,7 @@ CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 7eecbae13e..ac55b4d1c7 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -21,6 +21,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 6934a597a5..1a28327a1d 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -22,6 +22,7 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_BOOTDELAY=10
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index 7ade20205c..c755000330 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -23,6 +23,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DM=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 2724f045ed..7443977530 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -25,6 +25,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DM=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index fa2a02753f..6e91dc2d83 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -26,6 +26,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_MISC_INIT_R=y
+CONFIG_ID_EEPROM=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_EEPROM=y
CONFIG_CMD_DM=y
diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
index 1dde98e0ae..e3b4a02033 100644
--- a/configs/sifive_unmatched_defconfig
+++ b/configs/sifive_unmatched_defconfig
@@ -19,6 +19,7 @@ CONFIG_DEFAULT_FDT_FILE="sifive/hifive-unmatched-a00.dtb"
CONFIG_DISPLAY_CPUINFO=y
CONFIG_DISPLAY_BOARDINFO=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_ID_EEPROM=y
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_YMODEM_SUPPORT=y
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index d3e5da0c43..3aa74fd7ff 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -308,7 +308,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_I2C_FSL
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_CCID
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index b7e44d1737..258b9ec910 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -516,7 +516,6 @@ extern unsigned long get_sdram_size(void);
/* I2C EEPROM */
#if defined(CONFIG_TARGET_P1010RDB_PB)
-#define CONFIG_ID_EEPROM
#ifdef CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#endif
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 4ef061343c..90203819e5 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -88,7 +88,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 187304419e..615946ace5 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -170,7 +170,6 @@ unsigned long get_board_ddr_clk(void);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index f61b40fb3b..eea8a79eda 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -130,7 +130,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 601e67c80c..18c793a2f5 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -119,7 +119,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index c877f3c725..f84b7031e5 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -101,7 +101,6 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 3e5fdadc40..416e864341 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -54,7 +54,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 4c448c6b64..f441d1e6ef 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -110,7 +110,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 598f6c67a1..ba7b6c2f54 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -349,7 +349,6 @@ unsigned long get_board_ddr_clk(void);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 58c2d97a32..1e5189738c 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -116,7 +116,6 @@
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index ba308c514b..806f5cdbcf 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -227,7 +227,6 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index cbcf30e968..e349d7c494 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -103,7 +103,6 @@
#define I2C_MUX_CH_DEFAULT 0x8
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 1636f0bb8f..94a6609007 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -79,7 +79,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SCSI_AHCI_PLAT
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 84b83e6259..0b86655d5b 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -228,7 +228,6 @@
/* EEPROM */
#ifndef SPL_NO_EEPROM
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index fade815f26..691b621c44 100644
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -74,7 +74,6 @@
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 9102c812b5..7efd34a18b 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -103,7 +103,6 @@ unsigned long get_board_ddr_clk(void);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index dddaa25417..0beb97ab59 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -135,7 +135,6 @@
#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_CPLD_FTIM3
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 78ccc2dc5b..8d61166f46 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -335,7 +335,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index ad3043bbdb..fd2e508537 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -241,7 +241,6 @@
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 8bfe4b9811..42224aab05 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -304,7 +304,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index bfbde1da97..2e731f0994 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -286,7 +286,6 @@ unsigned long get_board_sys_clk(void);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 1ae7d37dd9..709fc42aa8 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -110,7 +110,6 @@
#define CONFIG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h
index ea1b1635fe..1aa1d1b41e 100644
--- a/include/configs/lx2160aqds.h
+++ b/include/configs/lx2160aqds.h
@@ -34,7 +34,6 @@ u8 qixis_esdhc_detect_quirk(void);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 097f1224c9..dd3b2344be 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -30,7 +30,6 @@
#define I2C_EMC2305_PWM 0x80
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h
index 847534c550..eca05402a1 100644
--- a/include/configs/lx2162aqds.h
+++ b/include/configs/lx2162aqds.h
@@ -38,7 +38,6 @@ u8 qixis_esdhc_detect_quirk(void);
#endif
/* EEPROM */
-#define CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 54c82b4f33..05a841d22b 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -484,7 +484,6 @@
/*
* I2C2 EEPROM
*/
-#undef CONFIG_ID_EEPROM
#define CONFIG_RTC_PT7C4338
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
index bea0eebe23..04b8cb5f8f 100644
--- a/include/configs/sifive-unmatched.h
+++ b/include/configs/sifive-unmatched.h
@@ -88,6 +88,4 @@
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1
-#define CONFIG_ID_EEPROM
-
#endif /* __SIFIVE_UNMATCHED_H */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index a9c2380d17..f278b52cd2 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -718,7 +718,6 @@ CONFIG_ICS307_REFCLK_HZ
CONFIG_IDE_PREINIT
CONFIG_IDE_RESET
CONFIG_IDE_SWAP_IO
-CONFIG_ID_EEPROM
CONFIG_IMA
CONFIG_IMX
CONFIG_IMX6_PWM_PER_CLK
From cee5effc452fac795afe819845d83b545b491983 Mon Sep 17 00:00:00 2001
From: "Som.Qin" <som.qin@starfivetech.com>
Date: Wed, 5 Jan 2022 09:52:02 +0800
Subject: [PATCH 5/7] starfive: apply VisionFive board changes
The VisionFive dts is base on Starlight dts, and the difference of
rst gpio, eeprom and gmac should be applied.
Signed-off-by: Som.Qin <som.qin@starfivetech.com>
---
arch/riscv/dts/jh7100-visionfive.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/riscv/dts/jh7100-visionfive.dts b/arch/riscv/dts/jh7100-visionfive.dts
index 33e51950b7..341911139b 100644
--- a/arch/riscv/dts/jh7100-visionfive.dts
+++ b/arch/riscv/dts/jh7100-visionfive.dts
@@ -6,6 +6,21 @@
/ {
model = "StarFive VisionFive V1";
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio 63 GPIO_ACTIVE_HIGH>;
+ priority = <256>;
+ };
+};
+
+&gmac {
+ /delete-property/ snps,reset-gpios;
+};
+
+&gpio {
+ /* don't reset gpio mux for serial console and reset gpio */
+ starfive,keep-gpiomux = <13 14 63>;
};
&i2c0 {
From f4bbb9dcb22cc98090ed7e8514a427a30ab27669 Mon Sep 17 00:00:00 2001
From: "Som.Qin" <som.qin@starfivetech.com>
Date: Wed, 5 Jan 2022 10:10:40 +0800
Subject: [PATCH 6/7] starfive: Fix the compile issue of starfive ID_EEPROM
The issue:
Error: You must add new CONFIG options using Kconfig
The following new ad-hoc CONFIG options were detected:
CONFIG_STARFIVE_EEPROM_ATOM1_PSTR
CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE
CONFIG_STARFIVE_EEPROM_ATOM1_SN_OFFSET
CONFIG_STARFIVE_EEPROM_ATOM1_VSTR
CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE
CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX
CONFIG_STARFIVE_EEPROM_WP_OFFSET
Signed-off-by: Som.Qin <som.qin@starfivetech.com>
---
board/starfive/jh7100/jh7100-i2c-eeprom.c | 44 +++++++++++------------
include/configs/starfive-jh7100.h | 14 ++++----
2 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/board/starfive/jh7100/jh7100-i2c-eeprom.c b/board/starfive/jh7100/jh7100-i2c-eeprom.c
index 10eb604d8a..3f6dfb9292 100644
--- a/board/starfive/jh7100/jh7100-i2c-eeprom.c
+++ b/board/starfive/jh7100/jh7100-i2c-eeprom.c
@@ -77,8 +77,8 @@ struct starfive_eeprom_atom1_data {
u16 pver;
u8 vslen;
u8 pslen;
- uchar vstr[CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE];
- uchar pstr[CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE]; /* product SN */
+ uchar vstr[STARFIVE_EEPROM_ATOM1_VSTR_SIZE];
+ uchar pstr[STARFIVE_EEPROM_ATOM1_PSTR_SIZE]; /* product SN */
};
struct starfive_eeprom_atom1 {
@@ -122,7 +122,7 @@ struct starfive_eeprom_info {
static struct starfive_eeprom_info einfo;
-static uchar eeprom_wp_buff[CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX];
+static uchar eeprom_wp_buff[STARFIVE_EEPROM_HATS_SIZE_MAX];
static struct eeprom_hats_header starfive_eeprom_hats_header_default = {
.signature = STARFIVE_EEPROM_HATS_SIG,
.version = FORMAT_VERSION,
@@ -141,10 +141,10 @@ static struct starfive_eeprom_atom1 starfive_eeprom_atom1_default = {
.uuid = {0},
.pid = 0,
.pver = 0,
- .vslen = CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE,
- .pslen = CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE,
- .vstr = CONFIG_STARFIVE_EEPROM_ATOM1_VSTR,
- .pstr = CONFIG_STARFIVE_EEPROM_ATOM1_PSTR
+ .vslen = STARFIVE_EEPROM_ATOM1_VSTR_SIZE,
+ .pslen = STARFIVE_EEPROM_ATOM1_PSTR_SIZE,
+ .vstr = STARFIVE_EEPROM_ATOM1_VSTR,
+ .pstr = STARFIVE_EEPROM_ATOM1_PSTR
}
};
static struct starfive_eeprom_atom4_v1 starfive_eeprom_atom4_v1_default = {
@@ -365,7 +365,7 @@ static int parse_eeprom_info(struct eeprom_hats_header *buf)
einfo.vstr = atom1->vstr;
einfo.pstr = atom1->pstr;
einfo.serialnum = (u32)hextoul((void *)atom1->pstr +
- CONFIG_STARFIVE_EEPROM_ATOM1_SN_OFFSET,
+ STARFIVE_EEPROM_ATOM1_SN_OFFSET,
NULL);
} else {
printf("fail to get vendor atom\n");
@@ -398,7 +398,7 @@ static int parse_eeprom_info(struct eeprom_hats_header *buf)
error:
has_been_read = -1;
dump_raw_eeprom(eeprom_wp_buff,
- CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ STARFIVE_EEPROM_HATS_SIZE_MAX);
return -1;
}
@@ -408,8 +408,8 @@ error:
* Return: status code, 0: Success, non-0: Fail
* Note: depend on CONFIG_SYS_EEPROM_BUS_NUM
* CONFIG_SYS_I2C_EEPROM_ADDR
- * CONFIG_STARFIVE_EEPROM_WP_OFFSET
- * CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX
+ * STARFIVE_EEPROM_WP_OFFSET
+ * STARFIVE_EEPROM_HATS_SIZE_MAX
*/
static int read_eeprom(uint8_t *buf)
{
@@ -424,8 +424,8 @@ static int read_eeprom(uint8_t *buf)
CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
&dev);
if (!ret) {
- ret = dm_i2c_read(dev, CONFIG_STARFIVE_EEPROM_WP_OFFSET,
- buf, CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ ret = dm_i2c_read(dev, STARFIVE_EEPROM_WP_OFFSET,
+ buf, STARFIVE_EEPROM_HATS_SIZE_MAX);
}
if (ret) {
@@ -443,7 +443,7 @@ static int prog_eeprom(uint8_t *buf, unsigned int size)
{
unsigned int i;
void *p;
- uchar tmp_buff[CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX];
+ uchar tmp_buff[STARFIVE_EEPROM_HATS_SIZE_MAX];
struct udevice *dev;
int ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
CONFIG_SYS_I2C_EEPROM_ADDR,
@@ -459,7 +459,7 @@ static int prog_eeprom(uint8_t *buf, unsigned int size)
i += BYTES_PER_EEPROM_PAGE, p += BYTES_PER_EEPROM_PAGE) {
if (!ret)
ret = dm_i2c_write(dev,
- i + CONFIG_STARFIVE_EEPROM_WP_OFFSET,
+ i + STARFIVE_EEPROM_WP_OFFSET,
p, min((int)(size - i),
BYTES_PER_EEPROM_PAGE));
if (ret)
@@ -470,11 +470,11 @@ static int prog_eeprom(uint8_t *buf, unsigned int size)
if (!ret) {
/* Verify the write by reading back the EEPROM and comparing */
ret = dm_i2c_read(dev,
- CONFIG_STARFIVE_EEPROM_WP_OFFSET,
+ STARFIVE_EEPROM_WP_OFFSET,
tmp_buff,
- CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ STARFIVE_EEPROM_HATS_SIZE_MAX);
if (!ret && memcmp((void *)buf, (void *)tmp_buff,
- CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX))
+ STARFIVE_EEPROM_HATS_SIZE_MAX))
ret = -1;
}
@@ -482,7 +482,7 @@ static int prog_eeprom(uint8_t *buf, unsigned int size)
has_been_read = -1;
printf("Programming failed.Temp buff:\n");
dump_raw_eeprom(tmp_buff,
- CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ STARFIVE_EEPROM_HATS_SIZE_MAX);
return -1;
}
@@ -589,7 +589,7 @@ static void set_product_id(char *string)
HATS_ATOM_VENDOR);
memcpy((void *)einfo.pstr, (void *)string,
- CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE);
+ STARFIVE_EEPROM_ATOM1_PSTR_SIZE);
update_crc(atom1);
}
@@ -664,7 +664,7 @@ int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
return 0;
} else if (!strcmp(cmd, "write_eeprom")) {
return prog_eeprom(eeprom_wp_buff,
- CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX);
+ STARFIVE_EEPROM_HATS_SIZE_MAX);
}
if (argc != 3)
@@ -731,4 +731,4 @@ int mac_read_from_eeprom(void)
env_set("serial#", einfo.pstr);
return 0;
-}
\ No newline at end of file
+}
diff --git a/include/configs/starfive-jh7100.h b/include/configs/starfive-jh7100.h
index e97f0f5fdd..a36f7d80fb 100755
--- a/include/configs/starfive-jh7100.h
+++ b/include/configs/starfive-jh7100.h
@@ -128,13 +128,13 @@
/* Magic number at the first four bytes of EEPROM HATs */
#define STARFIVE_EEPROM_HATS_SIG "SFVF" /* StarFive VisionFive */
-#define CONFIG_STARFIVE_EEPROM_HATS_SIZE_MAX 128 /* Header + Atom1&4(v1) */
-#define CONFIG_STARFIVE_EEPROM_WP_OFFSET 256 /* Read only field */
-#define CONFIG_STARFIVE_EEPROM_ATOM1_PSTR "VF7100A1-2201-D008E000-00000001\0"
-#define CONFIG_STARFIVE_EEPROM_ATOM1_PSTR_SIZE 32
-#define CONFIG_STARFIVE_EEPROM_ATOM1_SN_OFFSET 23
-#define CONFIG_STARFIVE_EEPROM_ATOM1_VSTR "StarFive Technology Co., Ltd.\0\0\0"
-#define CONFIG_STARFIVE_EEPROM_ATOM1_VSTR_SIZE 32
+#define STARFIVE_EEPROM_HATS_SIZE_MAX 128 /* Header + Atom1&4(v1) */
+#define STARFIVE_EEPROM_WP_OFFSET 256 /* Read only field */
+#define STARFIVE_EEPROM_ATOM1_PSTR "VF7100A1-2201-D008E000-00000001\0"
+#define STARFIVE_EEPROM_ATOM1_PSTR_SIZE 32
+#define STARFIVE_EEPROM_ATOM1_SN_OFFSET 23
+#define STARFIVE_EEPROM_ATOM1_VSTR "StarFive Technology Co., Ltd.\0\0\0"
+#define STARFIVE_EEPROM_ATOM1_VSTR_SIZE 32
#endif
#endif /* __CONFIG_H */
From c9954fb33ecb480dae56882ff8bf3dd8218644ef Mon Sep 17 00:00:00 2001
From: "Jianlong.Huang" <jianlong.huang@starfivetech.com>
Date: Wed, 27 Oct 2021 09:17:57 +0800
Subject: [PATCH 7/7] cmd/eeprom: fix data type issue for parse_numeric_param
This patch fixs parse_numeric_param issue on some platfrom which has
different sizes of int and long, like riscv64.
On riscv64, int is 4 bytes, but long is 8 bytes.
on this situation:
ulong addr = parse_numeric_param(argv[index]);
if argv[index] is "0x80000000", this "ulong addr" will be
0xffffffff80000000.
Signed-off-by: Jianlong.Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Wei Fu <wefu@redhat.com>
Signed-off-by: Wei Fu <wefu@redhat.com>
---
cmd/eeprom.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index efd6f3ac03..d316392f87 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -218,10 +218,10 @@ int eeprom_write(unsigned dev_addr, unsigned offset,
return ret;
}
-static int parse_numeric_param(char *str)
+static long parse_numeric_param(char *str)
{
char *endptr;
- int value = simple_strtol(str, &endptr, 16);
+ long value = simple_strtol(str, &endptr, 16);
return (*endptr != '\0') ? -1 : value;
}