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spl: fpga: Implement fpga bistream loading with fpga_load

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This patch partially reverts:
"spl: fit: Add support for loading FPGA bitstream"
(sha1: 26a642238b)

There shouldn't be a need to call private spl_load_fpga_image function
because the whole sequence should be already handled by fpga framework.
If there is missing loading bistream by chunks it should be done via
fpga framework instead of having private hooks.
Also spl_load_fpga_image() weak function is not used anywhere and
opening a way for not reviewed hacks out of mainline U-Boot is not the
right way to go.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2018-07-18 14:33:15 +02:00
parent 892f93de61
commit 3313ae668e
1 changed files with 16 additions and 18 deletions
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34
common/spl/spl_fit.c
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@ -6,6 +6,7 @@
#include <common.h> #include <common.h>
#include <errno.h> #include <errno.h>
#include <fpga.h>
#include <image.h> #include <image.h>
#include <linux/libfdt.h> #include <linux/libfdt.h>
#include <spl.h> #include <spl.h>
@ -140,14 +141,6 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
return (data_size + info->bl_len - 1) / info->bl_len; return (data_size + info->bl_len - 1) / info->bl_len;
} }
#ifdef CONFIG_SPL_FPGA_SUPPORT
__weak int spl_load_fpga_image(struct spl_load_info *info, size_t length,
int nr_sectors, int sector_offset)
{
return 0;
}
#endif
/** /**
* spl_load_fit_image(): load the image described in a certain FIT node * spl_load_fit_image(): load the image described in a certain FIT node
* @info: points to information about the device to load data from * @info: points to information about the device to load data from
@ -169,7 +162,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
void *fit, ulong base_offset, int node, void *fit, ulong base_offset, int node,
struct spl_image_info *image_info) struct spl_image_info *image_info)
{ {
int offset, sector_offset; int offset;
size_t length; size_t length;
int len; int len;
ulong size; ulong size;
@ -217,16 +210,9 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
overhead = get_aligned_image_overhead(info, offset); overhead = get_aligned_image_overhead(info, offset);
nr_sectors = get_aligned_image_size(info, length, offset); nr_sectors = get_aligned_image_size(info, length, offset);
sector_offset = sector + get_aligned_image_offset(info, offset);
#ifdef CONFIG_SPL_FPGA_SUPPORT if (info->read(info,
if (type == IH_TYPE_FPGA) { sector + get_aligned_image_offset(info, offset),
return spl_load_fpga_image(info, length, nr_sectors,
sector_offset);
}
#endif
if (info->read(info, sector_offset,
nr_sectors, (void *)load_ptr) != nr_sectors) nr_sectors, (void *)load_ptr) != nr_sectors)
return -EIO; return -EIO;
@ -409,6 +395,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
printf("%s: Cannot load the FPGA: %i\n", __func__, ret); printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
return ret; return ret;
} }
debug("FPGA bitstream at: %x, size: %x\n",
(u32)spl_image->load_addr, spl_image->size);
ret = fpga_load(0, (const void *)spl_image->load_addr,
spl_image->size, BIT_FULL);
if (ret) {
printf("%s: Cannot load the image to the FPGA\n",
__func__);
return ret;
}
puts("FPGA image loaded from FIT\n"); puts("FPGA image loaded from FIT\n");
node = -1; node = -1;
} }