mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 13:11:31 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-samsung
This commit is contained in:
commit
3419af770d
16 changed files with 193 additions and 28 deletions
|
@ -14,7 +14,6 @@
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|||
#define PLL_DIV_1024 1024
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#define PLL_DIV_65535 65535
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#define PLL_DIV_65536 65536
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/* *
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* This structure is to store the src bit, div bit and prediv bit
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* positions of the peripheral clocks of the src and div registers
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@ -423,8 +422,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
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case PERIPH_ID_I2C6:
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case PERIPH_ID_I2C7:
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src = EXYNOS_SRC_MPLL;
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div = readl(&clk->div_top0);
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sub_div = readl(&clk->div_top1);
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div = readl(&clk->div_top1);
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sub_div = readl(&clk->div_top0);
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break;
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default:
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debug("%s: invalid peripheral %d", __func__, peripheral);
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@ -1028,6 +1027,40 @@ static unsigned long exynos5420_get_lcd_clk(void)
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return pclk;
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}
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static unsigned long exynos5800_get_lcd_clk(void)
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{
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struct exynos5420_clock *clk =
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(struct exynos5420_clock *)samsung_get_base_clock();
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unsigned long sclk;
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unsigned int sel;
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unsigned int ratio;
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/*
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* CLK_SRC_DISP10
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* CLKMUX_FIMD1 [6:4]
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*/
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sel = (readl(&clk->src_disp10) >> 4) & 0x7;
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if (sel) {
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/*
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* Mapping of CLK_SRC_DISP10 CLKMUX_FIMD1 [6:4] values into
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* PLLs. The first element is a placeholder to bypass the
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* default settig.
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*/
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const int reg_map[] = {0, CPLL, DPLL, MPLL, SPLL, IPLL, EPLL,
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RPLL};
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sclk = get_pll_clk(reg_map[sel]);
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} else
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sclk = CONFIG_SYS_CLK_FREQ;
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/*
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* CLK_DIV_DISP10
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* FIMD1_RATIO [3:0]
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*/
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ratio = readl(&clk->div_disp10) & 0xf;
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return sclk / (ratio + 1);
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}
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void exynos4_set_lcd_clk(void)
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{
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struct exynos4_clock *clk =
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@ -1159,6 +1192,28 @@ void exynos5420_set_lcd_clk(void)
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writel(cfg, &clk->div_disp10);
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}
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void exynos5800_set_lcd_clk(void)
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{
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struct exynos5420_clock *clk =
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(struct exynos5420_clock *)samsung_get_base_clock();
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unsigned int cfg;
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/*
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* Use RPLL for pixel clock
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* CLK_SRC_DISP10 CLKMUX_FIMD1 [6:4]
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* ==================
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* 111: SCLK_RPLL
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*/
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cfg = readl(&clk->src_disp10) | (0x7 << 4);
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writel(cfg, &clk->src_disp10);
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/*
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* CLK_DIV_DISP10
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* FIMD1_RATIO [3:0]
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*/
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clrsetbits_le32(&clk->div_disp10, 0xf << 0, 0x0 << 0);
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}
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void exynos4_set_mipi_clk(void)
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{
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struct exynos4_clock *clk =
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|
@ -1646,8 +1701,10 @@ unsigned long get_lcd_clk(void)
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if (cpu_is_exynos4())
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return exynos4_get_lcd_clk();
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else {
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if (proid_is_exynos5420() || proid_is_exynos5800())
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if (proid_is_exynos5420())
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return exynos5420_get_lcd_clk();
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else if (proid_is_exynos5800())
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return exynos5800_get_lcd_clk();
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else
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return exynos5_get_lcd_clk();
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}
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|
@ -1660,8 +1717,10 @@ void set_lcd_clk(void)
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else {
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if (proid_is_exynos5250())
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exynos5_set_lcd_clk();
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else if (proid_is_exynos5420() || proid_is_exynos5800())
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else if (proid_is_exynos5420())
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exynos5420_set_lcd_clk();
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else
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exynos5800_set_lcd_clk();
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}
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}
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|
|
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@ -179,10 +179,10 @@ struct mem_timings mem_timings[] = {
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.spll_mdiv = 0xc8,
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.spll_pdiv = 0x3,
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.spll_sdiv = 0x2,
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/* RPLL @70.5Mhz */
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/* RPLL @141Mhz */
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.rpll_mdiv = 0x5E,
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.rpll_pdiv = 0x2,
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.rpll_sdiv = 0x4,
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.rpll_sdiv = 0x3,
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.direct_cmd_msr = {
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0x00020018, 0x00030000, 0x00010046, 0x00000d70,
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|
|
|
@ -67,6 +67,8 @@
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edp-lvds-bridge@48 {
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compatible = "parade,ps8625";
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reg = <0x48>;
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sleep-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
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reset-gpio = <&gpy7 7 GPIO_ACTIVE_HIGH>;
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};
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};
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|
|
|
@ -168,6 +168,7 @@
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fimd@14400000 {
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/* sysmmu is not used in U-Boot */
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samsung,disable-sysmmu;
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samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
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};
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dp@145b0000 {
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|
|
|
@ -144,10 +144,13 @@
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samsung,vl-vfpd = <10>;
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samsung,vl-cmd-allow-len = <0xf>;
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samsung,power-on-delay = <30000>;
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samsung,winid = <3>;
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samsung,interface-mode = <1>;
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samsung,dp-enabled = <1>;
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samsung,dual-lcd-enabled = <0>;
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samsung,bl-en-gpio = <&gpx2 2 GPIO_ACTIVE_HIGH>;
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};
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};
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|
|
|
@ -16,6 +16,9 @@
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#define BPLL 5
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#define RPLL 6
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#define SPLL 7
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#define CPLL 8
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#define DPLL 9
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#define IPLL 10
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#define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8))
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#define MASK_RATIO(x) (0xf << (x << 4))
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|
|
|
@ -58,16 +58,6 @@ void exynos_lcd_power_on(void)
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mdelay(5);
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/* TODO(ajaykumar.rs@samsung.com): Use device tree */
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gpio_request(EXYNOS5420_GPIO_X35, "edp_slp#");
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gpio_direction_output(EXYNOS5420_GPIO_X35, 1); /* EDP_SLP# */
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mdelay(10);
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gpio_request(EXYNOS5420_GPIO_Y77, "edp_rst#");
|
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gpio_direction_output(EXYNOS5420_GPIO_Y77, 1); /* EDP_RST# */
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gpio_request(EXYNOS5420_GPIO_X26, "edp_hpd");
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gpio_direction_input(EXYNOS5420_GPIO_X26); /* EDP_HPD */
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gpio_set_pull(EXYNOS5420_GPIO_X26, S5P_GPIO_PULL_NONE);
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|
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if (has_edp_bridge())
|
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if (parade_init(gd->fdt_blob))
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printf("%s: ps8625_init() failed\n", __func__);
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|
@ -75,11 +65,6 @@ void exynos_lcd_power_on(void)
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|||
|
||||
void exynos_backlight_on(unsigned int onoff)
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{
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/* For PWM */
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gpio_request(EXYNOS5420_GPIO_B20, "backlight_on");
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gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(0x1));
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gpio_set_value(EXYNOS5420_GPIO_B20, 1);
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#ifdef CONFIG_POWER_TPS65090
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tps65090_fet_enable(1);
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#endif
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|
|
|
@ -61,6 +61,8 @@ Board(panel specific):
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|||
disabled with compatible string
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"samsung,sysmmu-v3.3", with a "reg" property
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holding the register address of FIMD sysmmu.
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samsung,pwm-out-gpio: PWM output GPIO.
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samsung,bl-en-gpio: backlight enable GPIO.
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Example:
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SOC specific part:
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|
|
|
@ -19,6 +19,7 @@
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#include <asm/arch/mipi_dsim.h>
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#include <asm/arch/dp_info.h>
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#include <asm/arch/system.h>
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#include <asm/gpio.h>
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#include <asm-generic/errno.h>
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#include "exynos_fb.h"
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|
@ -102,6 +103,10 @@ __weak int exynos_lcd_misc_init(vidinfo_t *vid)
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static void lcd_panel_on(vidinfo_t *vid)
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{
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struct gpio_desc pwm_out_gpio;
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struct gpio_desc bl_en_gpio;
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unsigned int node;
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udelay(vid->init_delay);
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exynos_backlight_reset();
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|
@ -121,6 +126,22 @@ static void lcd_panel_on(vidinfo_t *vid)
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exynos_backlight_on(1);
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|
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#ifdef CONFIG_OF_CONTROL
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node = fdtdec_next_compatible(gd->fdt_blob, 0,
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COMPAT_SAMSUNG_EXYNOS_FIMD);
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if (node <= 0) {
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debug("FIMD: Can't get device node for FIMD\n");
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return;
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}
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gpio_request_by_name_nodev(gd->fdt_blob, node, "samsung,pwm-out-gpio",
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0, &pwm_out_gpio,
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GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
|
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|
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gpio_request_by_name_nodev(gd->fdt_blob, node, "samsung,bl-en-gpio", 0,
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&bl_en_gpio,
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GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
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|
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#endif
|
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exynos_cfg_ldo();
|
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|
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exynos_enable_ldo(1);
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|
|
|
@ -12,6 +12,7 @@
|
|||
#include <common.h>
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#include <i2c.h>
|
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#include <fdtdec.h>
|
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#include <asm/gpio.h>
|
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|
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/*
|
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* Initialization of the chip is a process of writing certaing values into
|
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|
@ -180,6 +181,8 @@ static int parade_write_regs(int base_addr, const struct reg_data *table)
|
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|
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int parade_init(const void *blob)
|
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{
|
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struct gpio_desc rst_gpio;
|
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struct gpio_desc slp_gpio;
|
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int bus, old_bus;
|
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int parent;
|
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int node;
|
||||
|
@ -201,6 +204,14 @@ int parade_init(const void *blob)
|
|||
return -1;
|
||||
}
|
||||
|
||||
gpio_request_by_name_nodev(blob, node, "sleep-gpio", 0, &slp_gpio,
|
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GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
|
||||
|
||||
mdelay(10);
|
||||
|
||||
gpio_request_by_name_nodev(blob, node, "reset-gpio", 0, &rst_gpio,
|
||||
GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
|
||||
|
||||
bus = i2c_get_bus_num_fdt(parent);
|
||||
old_bus = i2c_get_bus_num();
|
||||
|
||||
|
|
|
@ -66,4 +66,58 @@
|
|||
#define CONFIG_CMD_USB_MASS_STORAGE
|
||||
#define CONFIG_USB_GADGET_MASS_STORAGE
|
||||
|
||||
/* Common environment variables */
|
||||
#define CONFIG_EXTRA_ENV_ITB \
|
||||
"loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \
|
||||
"${kernelname}\0" \
|
||||
"loadinitrd=load mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} " \
|
||||
"${initrdname}\0" \
|
||||
"loaddtb=load mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} " \
|
||||
"${fdtfile}\0" \
|
||||
"check_ramdisk=" \
|
||||
"if run loadinitrd; then " \
|
||||
"setenv initrd_addr ${initrdaddr};" \
|
||||
"else " \
|
||||
"setenv initrd_addr -;" \
|
||||
"fi;\0" \
|
||||
"check_dtb=" \
|
||||
"if run loaddtb; then " \
|
||||
"setenv fdt_addr ${fdtaddr};" \
|
||||
"else " \
|
||||
"setenv fdt_addr;" \
|
||||
"fi;\0" \
|
||||
"kernel_args=" \
|
||||
"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart}" \
|
||||
" ${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};\0" \
|
||||
"boot_fit=" \
|
||||
"setenv kerneladdr 0x42000000;" \
|
||||
"setenv kernelname Image.itb;" \
|
||||
"run loadkernel;" \
|
||||
"run kernel_args;" \
|
||||
"bootm ${kerneladdr}#${board_name}\0" \
|
||||
"boot_uimg=" \
|
||||
"setenv kerneladdr 0x40007FC0;" \
|
||||
"setenv kernelname uImage;" \
|
||||
"run check_dtb;" \
|
||||
"run check_ramdisk;" \
|
||||
"run loadkernel;" \
|
||||
"run kernel_args;" \
|
||||
"bootm ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \
|
||||
"boot_zimg=" \
|
||||
"setenv kerneladdr 0x40007FC0;" \
|
||||
"setenv kernelname zImage;" \
|
||||
"run check_dtb;" \
|
||||
"run check_ramdisk;" \
|
||||
"run loadkernel;" \
|
||||
"run kernel_args;" \
|
||||
"bootz ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \
|
||||
"autoboot=" \
|
||||
"if test -e mmc ${mmcdev}:${mmcbootpart} Image.itb; then; " \
|
||||
"run boot_fit;" \
|
||||
"elif test -e mmc ${mmcdev}:${mmcbootpart} zImage; then; " \
|
||||
"run boot_zimg;" \
|
||||
"elif test -e mmc ${mmcdev}:${mmcbootpart} uImage; then; " \
|
||||
"run boot_uimg;" \
|
||||
"fi;\0"
|
||||
|
||||
#endif /* __CONFIG_EXYNOS4_COMMON_H */
|
||||
|
|
|
@ -16,14 +16,14 @@
|
|||
#define CONFIG_SYS_CACHELINE_SIZE 64
|
||||
#define CONFIG_EXYNOS_SPL
|
||||
|
||||
/* Allow tracing to be enabled */
|
||||
#ifdef FTRACE
|
||||
#define CONFIG_TRACE
|
||||
#define CONFIG_CMD_TRACE
|
||||
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
|
||||
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
|
||||
#define CONFIG_TRACE_EARLY
|
||||
#define CONFIG_TRACE_EARLY_ADDR 0x50000000
|
||||
|
||||
#endif
|
||||
|
||||
/* Enable ACE acceleration for SHA1 and SHA256 */
|
||||
#define CONFIG_EXYNOS_ACE_SHA
|
||||
|
|
|
@ -16,6 +16,14 @@
|
|||
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
|
||||
#define CONFIG_SPI_BOOTING
|
||||
|
||||
#define MEM_LAYOUT_ENV_SETTINGS \
|
||||
"bootm_size=0x10000000\0" \
|
||||
"kernel_addr_r=0x22000000\0" \
|
||||
"fdt_addr_r=0x23000000\0" \
|
||||
"ramdisk_addr_r=0x23300000\0" \
|
||||
"scriptaddr=0x30000000\0" \
|
||||
"pxefile_addr_r=0x31000000\0"
|
||||
|
||||
#include <configs/exynos5420-common.h>
|
||||
#include <configs/exynos5-dt-common.h>
|
||||
|
||||
|
|
|
@ -16,6 +16,14 @@
|
|||
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
|
||||
#define CONFIG_SPI_BOOTING
|
||||
|
||||
#define MEM_LAYOUT_ENV_SETTINGS \
|
||||
"bootm_size=0x10000000\0" \
|
||||
"kernel_addr_r=0x22000000\0" \
|
||||
"fdt_addr_r=0x23000000\0" \
|
||||
"ramdisk_addr_r=0x23300000\0" \
|
||||
"scriptaddr=0x30000000\0" \
|
||||
"pxefile_addr_r=0x31000000\0"
|
||||
|
||||
#include <configs/exynos5420-common.h>
|
||||
#include <configs/exynos5-dt-common.h>
|
||||
|
||||
|
|
|
@ -51,8 +51,10 @@
|
|||
#define MACH_TYPE_TRATS 3928
|
||||
#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
|
||||
|
||||
#define CONFIG_FIT
|
||||
#define CONFIG_FIT_VERBOSE
|
||||
#define CONFIG_BOOTARGS "Please use defined boot"
|
||||
#define CONFIG_BOOTCOMMAND "run mmcboot"
|
||||
#define CONFIG_BOOTCOMMAND "run autoboot"
|
||||
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
|
||||
|
@ -106,7 +108,8 @@
|
|||
""PARTS_ROOT" part 0 5;" \
|
||||
""PARTS_DATA" part 0 6;" \
|
||||
""PARTS_UMS" part 0 7;" \
|
||||
"params.bin raw 0x38 0x8\0"
|
||||
"params.bin raw 0x38 0x8;" \
|
||||
"/Image.itb ext4 0 2\0"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"bootk=" \
|
||||
|
@ -172,6 +175,7 @@
|
|||
"setenv spl_imgsize;" \
|
||||
"setenv spl_imgaddr;" \
|
||||
"setenv spl_addr_tmp;\0" \
|
||||
CONFIG_EXTRA_ENV_ITB \
|
||||
"fdtaddr=40800000\0" \
|
||||
|
||||
/* Falcon mode definitions */
|
||||
|
|
|
@ -44,8 +44,10 @@
|
|||
#define CONFIG_SYS_CONSOLE_INFO_QUIET
|
||||
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
|
||||
|
||||
#define CONFIG_FIT
|
||||
#define CONFIG_FIT_VERBOSE
|
||||
#define CONFIG_BOOTARGS "Please use defined boot"
|
||||
#define CONFIG_BOOTCOMMAND "run mmcboot"
|
||||
#define CONFIG_BOOTCOMMAND "run autoboot"
|
||||
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
|
||||
|
@ -96,7 +98,8 @@
|
|||
""PARTS_ROOT" part 0 5;" \
|
||||
""PARTS_DATA" part 0 6;" \
|
||||
""PARTS_UMS" part 0 7;" \
|
||||
"params.bin raw 0x38 0x8\0"
|
||||
"params.bin raw 0x38 0x8;" \
|
||||
"/Image.itb ext4 0 2\0"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"bootk=" \
|
||||
|
@ -153,6 +156,7 @@
|
|||
"setenv spl_imgsize;" \
|
||||
"setenv spl_imgaddr;" \
|
||||
"setenv spl_addr_tmp;\0" \
|
||||
CONFIG_EXTRA_ENV_ITB \
|
||||
"fdtaddr=40800000\0" \
|
||||
|
||||
/* GPT */
|
||||
|
|
Loading…
Add table
Reference in a new issue