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net/phy: add YuTai Corp Ethernet PHYs(YT8511/YT8521) driver
This pathch adds YuTai Corp Ethernet PHYs(YT8511/YT8521) support. Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
This commit is contained in:
Walker Chen
som.qin
parent
6492303060
commit
3482c7c13c
5 changed files with 290 additions and 0 deletions
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@ -204,6 +204,9 @@ endif # PHY_MICREL
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config PHY_MSCC
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bool "Microsemi Corp Ethernet PHYs support"
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config PHY_YUTAI
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bool "YuTai Corp Ethernet PHYs support"
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config PHY_NATSEMI
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bool "National Semiconductor Ethernet PHYs support"
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@ -35,3 +35,4 @@ obj-$(CONFIG_PHY_VITESSE) += vitesse.o
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obj-$(CONFIG_PHY_MSCC) += mscc.o
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obj-$(CONFIG_PHY_FIXED) += fixed.o
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obj-$(CONFIG_PHY_NCSI) += ncsi.o
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obj-$(CONFIG_PHY_YUTAI) += motorcomm.o
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282
drivers/net/phy/motorcomm.c
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282
drivers/net/phy/motorcomm.c
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@ -0,0 +1,282 @@
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/*
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* RealTek PHY drivers
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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* author Andy Fleming
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*
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*/
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#include <config.h>
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#include <common.h>
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#include <phy.h>
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#define REG_PHY_SPEC_STATUS 0x11
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#define REG_DEBUG_ADDR_OFFSET 0x1e
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#define REG_DEBUG_DATA 0x1f
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#define EXTREG_SLEEP_CONTROL 0x27
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#define YT8512_DUPLEX 0x2000
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#define YT8521_SPEED_MODE 0xc000
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#define YT8521_DUPLEX 0x2000
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#define YT8521_SPEED_MODE_BIT 14
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#define YT8521_DUPLEX_BIT 13
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#define YT8521_LINK_STATUS_BIT 10
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#define SPEED_UNKNOWN -1
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static int ytphy_read_ext(struct phy_device *phydev, u32 regnum)
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{
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int ret;
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ret = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, regnum);
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if (ret < 0)
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return ret;
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return phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
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}
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static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val)
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{
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int ret;
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ret = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, regnum);
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if (ret < 0)
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return ret;
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return phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
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}
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static int yt8511_config(struct phy_device *phydev)
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{
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u16 val = 0;
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int err = 0;
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genphy_config_aneg(phydev);
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/* disable sleep mode */
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err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, EXTREG_SLEEP_CONTROL);
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if (err < 0) {
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printf("yt8511_config: write EXTREG_SLEEP_CONTROL error!\n");
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return err;
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}
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val = phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
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val &= ~(1<<15);
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err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
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if (err < 0) {
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printf("yt8511_config: write REG_DEBUG_DATA error!\n");
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return err;
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}
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/* config PLL clock */
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err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_ADDR_OFFSET, 0xc);
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if (err < 0) {
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printf("yt8511_config: write 0xc error!\n");
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return err;
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}
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val = phy_read(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA);
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/* ext reg 0xc.b[2:1]
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00-----25M from pll;
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01---- 25M from xtl;(default)
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10-----62.5M from pll;
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11----125M from pll(here set to this value)
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*/
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val &= ~(3<<1); //00-----25M from pll;
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val |= (1<<1); //01-----25M from xtl; (default)
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err = phy_write(phydev, MDIO_DEVAD_NONE, REG_DEBUG_DATA, val);
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if (err < 0) {
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printf("yt8511_config: set PLL error!\n");
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return err;
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}
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return 0;
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}
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static int yt8521_config(struct phy_device *phydev)
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{
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int ret, val;
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ytphy_write_ext(phydev, 0xa000, 0);
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genphy_config_aneg(phydev);
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/* disable auto sleep */
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val = ytphy_read_ext(phydev, EXTREG_SLEEP_CONTROL);
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if (val < 0) {
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printf("yt8521_config: read EXTREG_SLEEP_CONTROL error!\n");
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return val;
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}
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val &= ~(1<<15);
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ret = ytphy_write_ext(phydev, EXTREG_SLEEP_CONTROL, val);
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if (ret < 0) {
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printf("yt8521_config: write EXTREG_SLEEP_CONTROL error!\n");
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return ret;
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}
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/* enable tx delay 450ps per step */
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val = ytphy_read_ext(phydev, 0xa003);
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if (val < 0) {
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printf("yt8521_config: read 0xa003 error!\n");
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return val;
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}
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val |= 0x3;
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ret = ytphy_write_ext(phydev, 0xa003, val);
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if (ret < 0) {
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printf("yt8521_config: set 0xa003 error!\n");
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return ret;
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}
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/* disable rx delay */
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val = ytphy_read_ext(phydev, 0xa001);
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if (val < 0) {
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printf("yt8521_config: read 0xa001 error!\n");
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return val;
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}
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val &= ~(1<<8);
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ret = ytphy_write_ext(phydev, 0xa001, val);
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if (ret < 0) {
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printf("yt8521_config: failed to disable rx_delay!\n");
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return ret;
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}
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/* enable RXC clock when no wire plug */
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ret = ytphy_write_ext(phydev, 0xa000, 0);
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if (ret < 0) {
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printf("yt8521_config: failed to enable RXC clock!\n");
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return ret;
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}
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val = ytphy_read_ext(phydev, 0xc);
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if (val < 0) {
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printf("yt8521_config: read 0xc error!\n");
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return val;
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}
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val &= ~(1 << 12);
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ret = ytphy_write_ext(phydev, 0xc, val);
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if (ret < 0) {
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printf("yt8521_config: set 0xc error!\n");
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return ret;
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}
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return 0;
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}
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static int yt8521_adjust_status(struct phy_device *phydev, int val, int is_utp)
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{
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int speed_mode, duplex;
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int speed = SPEED_UNKNOWN;
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duplex = (val & YT8512_DUPLEX) >> YT8521_DUPLEX_BIT;
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speed_mode = (val & YT8521_SPEED_MODE) >> YT8521_SPEED_MODE_BIT;
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switch (speed_mode) {
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case 0:
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if (is_utp)
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speed = SPEED_10;
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break;
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case 1:
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speed = SPEED_100;
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break;
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case 2:
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speed = SPEED_1000;
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break;
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case 3:
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break;
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default:
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speed = SPEED_UNKNOWN;
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break;
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}
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phydev->speed = speed;
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phydev->duplex = duplex;
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return 0;
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}
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static int yt8521_parse_status(struct phy_device *phydev)
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{
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int ret, val, link, link_utp;
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/* reading UTP */
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ret = ytphy_write_ext(phydev, 0xa000, 0);
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if (ret < 0)
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return ret;
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val = phy_read(phydev, MDIO_DEVAD_NONE, REG_PHY_SPEC_STATUS);
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if (val < 0)
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return val;
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link = val & (BIT(YT8521_LINK_STATUS_BIT));
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if (link) {
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link_utp = 1;
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yt8521_adjust_status(phydev, val, 1);
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} else {
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link_utp = 0;
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}
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if (link_utp) {
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phydev->link = 1;
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ytphy_write_ext(phydev, 0xa000, 0);
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} else {
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phydev->link = 0;
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}
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return 0;
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}
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static int yt8521_startup(struct phy_device *phydev)
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{
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int retval;
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retval = genphy_update_link(phydev);
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if (retval)
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return retval;
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return yt8521_parse_status(phydev);
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}
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static struct phy_driver YT8511_driver = {
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.name = "YuTai YT8511",
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.uid = 0x0000010a,
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.mask = 0x00000fff,
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.features = PHY_GBIT_FEATURES,
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.config = &yt8511_config,
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.startup = &genphy_startup,
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.shutdown = &genphy_shutdown,
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};
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static struct phy_driver YT8521_driver = {
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.name = "YuTai YT8521",
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.uid = 0x0000011a,
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.mask = 0x00000fff,
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.features = PHY_GBIT_FEATURES,
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.config = &yt8521_config,
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.startup = &yt8521_startup,
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.shutdown = &genphy_shutdown,
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};
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int phy_yutai_init(void)
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{
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phy_register(&YT8511_driver);
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phy_register(&YT8521_driver);
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return 0;
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}
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@ -561,6 +561,9 @@ int phy_init(void)
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#endif
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#ifdef CONFIG_PHY_XILINX_GMII2RGMII
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phy_xilinx_gmii2rgmii_init();
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#endif
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#ifdef CONFIG_PHY_YUTAI
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phy_yutai_init();
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#endif
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genphy_init();
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@ -538,6 +538,7 @@ int phy_mscc_init(void);
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int phy_fixed_init(void);
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int phy_ncsi_init(void);
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int phy_xilinx_gmii2rgmii_init(void);
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int phy_yutai_init(void);
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int board_phy_config(struct phy_device *phydev);
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int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
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