From 9d23fc584c4b7b8bb9ecbee48920b1b04b08fa1b Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 12 Nov 2008 13:18:19 +0100 Subject: [PATCH 1/4] MIPS: Add onenand_init() to board.c and move nand_init() This patch adds a call to onenand_init() for OneNAND support and moves the nand_init() call to an earlier place, so that the environment can be used from NAND and OneNAND. Signed-off-by: Stefan Roese Signed-off-by: Shinya Kuribayashi --- lib_mips/board.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/lib_mips/board.c b/lib_mips/board.c index 9c997f1908..5133b8a5dc 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -30,6 +30,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -378,6 +379,15 @@ void board_init_r (gd_t *id, ulong dest_addr) mem_malloc_init(); malloc_bin_reloc(); +#ifdef CONFIG_CMD_NAND + puts ("NAND: "); + nand_init (); /* go init the NAND */ +#endif + +#if defined(CONFIG_CMD_ONENAND) + onenand_init(); +#endif + /* relocate environment function pointers etc. */ env_relocate(); @@ -419,11 +429,6 @@ void board_init_r (gd_t *id, ulong dest_addr) } #endif -#ifdef CONFIG_CMD_NAND - puts ("NAND: "); - nand_init (); /* go init the NAND */ -#endif - #ifdef CONFIG_CMD_SPI puts ("SPI: "); spi_init (); /* go init the SPI */ From db08ecaa6eb8176904b3bae103a85ee8f735dc40 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 12 Nov 2008 13:18:02 +0100 Subject: [PATCH 2/4] MIPS: Add board_early_init_f() to init_sequence This patch adds the board_early_init_f() call to the MIPS init sequence. A weak dummy implementation is also added which can be overridden by a board specific version. This will be used by the upcoming VCTH board support. Signed-off-by: Stefan Roese Signed-off-by: Shinya Kuribayashi --- lib_mips/board.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/lib_mips/board.c b/lib_mips/board.c index 5133b8a5dc..dfe683161f 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -72,6 +72,15 @@ static ulong mem_malloc_brk; */ unsigned long mips_io_port_base = -1; +int __board_early_init_f(void) +{ + /* + * Nothing to do in this dummy implementation + */ + return 0; +} +int board_early_init_f(void) __attribute__((weak, alias("__board_early_init_f"))); + /* * The Malloc area is immediately below the monitor copy in DRAM */ @@ -169,6 +178,7 @@ static int init_baudrate (void) typedef int (init_fnc_t) (void); init_fnc_t *init_sequence[] = { + board_early_init_f, timer_init, env_init, /* initialize environment */ #ifdef CONFIG_INCA_IP From 44174343688dba32571a34550dba08971c65fef1 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 18 Nov 2008 16:36:22 +0100 Subject: [PATCH 3/4] MIPS: Add CONFIG_SKIP_LOWLEVEL_INIT This patch adds the CONFIG_SKIP_LOWLEVEL_INIT option to start.S. This enables support for boards where the lowlevel initialization is already done when U-Boot runs (e.g. via OnChip ROM). This will be used in the upcoming VCTH board support. Signed-off-by: Stefan Roese Signed-off-by: Shinya Kuribayashi --- cpu/mips/start.S | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/cpu/mips/start.S b/cpu/mips/start.S index 6a22302a08..f6069b3eea 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -243,9 +243,11 @@ reset: mtc0 zero, CP0_COUNT mtc0 zero, CP0_COMPARE +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) /* CONFIG0 register */ li t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG +#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */ /* Initialize $gp. */ @@ -255,6 +257,7 @@ reset: 1: lw gp, 0(ra) +#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) /* Initialize any external memory. */ la t9, lowlevel_init @@ -271,6 +274,7 @@ reset: */ li t0, CONF_CM_CACHABLE_NONCOHERENT mtc0 t0, CP0_CONFIG +#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */ /* Set up temporary stack. */ From 71fa0714fe5134bc8718c38d5261d267e88582ba Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 18 Nov 2008 16:36:12 +0100 Subject: [PATCH 4/4] MIPS: Flush data cache upon relocation This patch now adds a flush to the data cache upon relocation. The current implementation is missing this. Only a comment states that it should be done. So let's really do it now. Signed-off-by: Stefan Roese Signed-off-by: Shinya Kuribayashi --- cpu/mips/start.S | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/cpu/mips/start.S b/cpu/mips/start.S index f6069b3eea..57db589b94 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -311,6 +311,7 @@ relocate_code: la t3, in_ram lw t2, -12(t3) /* t2 <-- uboot_end_data */ move t1, a2 + move s2, a2 /* s2 <-- destination address */ /* * Fix $gp: @@ -320,13 +321,21 @@ relocate_code: move t6, gp sub gp, CONFIG_SYS_MONITOR_BASE add gp, a2 /* gp now adjusted */ - sub t6, gp, t6 /* t6 <-- relocation offset */ + sub s1, gp, t6 /* s1 <-- relocation offset */ /* * t0 = source address * t1 = target address * t2 = source end address */ + + /* + * Save destination address and size for later usage in flush_cache() + */ + move s0, a1 /* save gd in s0 */ + move a0, t1 /* a0 <-- destination addr */ + sub a1, t2, t0 /* a1 <-- size */ + /* On the purple board we copy the code earlier in a special way * in order to solve flash problems */ @@ -342,9 +351,14 @@ relocate_code: /* If caches were enabled, we would have to flush them here. */ + /* a0 & a1 are already set up for flush_cache(start, size) */ + la t9, flush_cache + jalr t9 + nop + /* Jump to where we've relocated ourselves. */ - addi t0, a2, in_ram - _start + addi t0, s2, in_ram - _start jr t0 nop @@ -371,7 +385,7 @@ in_ram: 1: lw t1, 0(t4) beqz t1, 2f - add t1, t6 + add t1, s1 sw t1, 0(t4) 2: addi t2, 1 @@ -382,8 +396,8 @@ in_ram: */ lw t1, -12(t0) /* t1 <-- uboot_end_data */ lw t2, -8(t0) /* t2 <-- uboot_end */ - add t1, t6 /* adjust pointers */ - add t2, t6 + add t1, s1 /* adjust pointers */ + add t2, s1 sub t1, 4 1: @@ -391,10 +405,10 @@ in_ram: bltl t1, t2, 1b sw zero, 0(t1) /* delay slot */ - move a0, a1 + move a0, s0 /* a0 <-- gd */ la t9, board_init_r jr t9 - move a1, a2 /* delay slot */ + move a1, s2 /* delay slot */ .end relocate_code