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ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1
Fix data types and constify where applicable, fix broken multiline debug strings and fix comments. No functional change. Signed-off-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Marek Vasut
parent
ac63b9ada5
commit
3b44f55c3b
1 changed files with 63 additions and 61 deletions
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@ -2887,24 +2887,26 @@ static uint32_t rw_mgr_mem_calibrate_write_test(uint32_t rank_bgn,
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* center all windows. do per-bit-deskew to possibly increase size of
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* certain windows.
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*/
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static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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uint32_t write_group, uint32_t test_bgn)
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static int
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rw_mgr_mem_calibrate_writes_center(const u32 rank_bgn, const u32 write_group,
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const u32 test_bgn)
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{
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uint32_t i, min_index;
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int32_t d;
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/*
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* Store these as signed since there are comparisons with
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* signed numbers.
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*/
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uint32_t bit_chk;
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uint32_t sticky_bit_chk;
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int32_t left_edge[RW_MGR_MEM_DQ_PER_WRITE_DQS];
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int32_t right_edge[RW_MGR_MEM_DQ_PER_WRITE_DQS];
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int32_t mid;
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int32_t mid_min, orig_mid_min;
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int32_t new_dqs, start_dqs;
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int32_t dq_margin, dqs_margin, dm_margin;
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uint32_t addr;
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int i, d;
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u32 bit_chk;
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u32 sticky_bit_chk;
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u32 min_index;
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u32 addr;
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int left_edge[RW_MGR_MEM_DQ_PER_WRITE_DQS];
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int right_edge[RW_MGR_MEM_DQ_PER_WRITE_DQS];
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int mid;
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int mid_min, orig_mid_min;
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int new_dqs, start_dqs;
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int dq_margin, dqs_margin, dm_margin;
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int bgn_curr = IO_IO_OUT1_DELAY_MAX + 1;
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int end_curr = IO_IO_OUT1_DELAY_MAX + 1;
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int bgn_best = IO_IO_OUT1_DELAY_MAX + 1;
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int end_best = IO_IO_OUT1_DELAY_MAX + 1;
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int win_best = 0;
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int ret;
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@ -2916,11 +2918,11 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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start_dqs = readl(addr +
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(RW_MGR_MEM_DQ_PER_WRITE_DQS << 2));
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/* per-bit deskew */
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/* Per-bit deskew. */
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/*
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* set the left and right edge of each bit to an illegal value
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* use (IO_IO_OUT1_DELAY_MAX + 1) as an illegal value.
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* Set the left and right edge of each bit to an illegal value.
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* Use (IO_IO_OUT1_DELAY_MAX + 1) as an illegal value.
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*/
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sticky_bit_chk = 0;
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for (i = 0; i < RW_MGR_MEM_DQ_PER_WRITE_DQS; i++) {
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@ -2928,12 +2930,12 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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right_edge[i] = IO_IO_OUT1_DELAY_MAX + 1;
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}
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/* Search for the left edge of the window for each bit */
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/* Search for the left edge of the window for each bit. */
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search_left_edge(1, rank_bgn, write_group, 0, test_bgn,
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&sticky_bit_chk,
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left_edge, right_edge, 0);
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/* Search for the right edge of the window for each bit */
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/* Search for the right edge of the window for each bit. */
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ret = search_right_edge(1, rank_bgn, write_group, 0,
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start_dqs, 0,
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&sticky_bit_chk,
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@ -2946,12 +2948,13 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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min_index = get_window_mid_index(1, left_edge, right_edge, &mid_min);
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/* Determine the amount we can change DQS (which is -mid_min) */
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/* Determine the amount we can change DQS (which is -mid_min). */
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orig_mid_min = mid_min;
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new_dqs = start_dqs;
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mid_min = 0;
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debug_cond(DLEVEL == 1, "%s:%d write_center: start_dqs=%d new_dqs=%d \
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mid_min=%d\n", __func__, __LINE__, start_dqs, new_dqs, mid_min);
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debug_cond(DLEVEL == 1,
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"%s:%d write_center: start_dqs=%d new_dqs=%d mid_min=%d\n",
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__func__, __LINE__, start_dqs, new_dqs, mid_min);
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/* Add delay to bring centre of all DQ windows to the same "level". */
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center_dq_windows(1, left_edge, right_edge, mid_min, orig_mid_min,
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@ -2965,18 +2968,13 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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debug_cond(DLEVEL == 2, "%s:%d write_center: DM\n", __func__, __LINE__);
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/*
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* set the left and right edge of each bit to an illegal value,
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* use (IO_IO_OUT1_DELAY_MAX + 1) as an illegal value,
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* Set the left and right edge of each bit to an illegal value.
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* Use (IO_IO_OUT1_DELAY_MAX + 1) as an illegal value.
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*/
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left_edge[0] = IO_IO_OUT1_DELAY_MAX + 1;
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right_edge[0] = IO_IO_OUT1_DELAY_MAX + 1;
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int32_t bgn_curr = IO_IO_OUT1_DELAY_MAX + 1;
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int32_t end_curr = IO_IO_OUT1_DELAY_MAX + 1;
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int32_t bgn_best = IO_IO_OUT1_DELAY_MAX + 1;
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int32_t end_best = IO_IO_OUT1_DELAY_MAX + 1;
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int32_t win_best = 0;
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/* Search for the/part of the window with DM shift */
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/* Search for the/part of the window with DM shift. */
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for (d = IO_IO_OUT1_DELAY_MAX; d >= 0; d -= DELTA_D) {
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scc_mgr_apply_group_dm_out1_delay(d);
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writel(0, &sdr_scc_mgr->update);
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@ -2984,7 +2982,7 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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if (rw_mgr_mem_calibrate_write_test(rank_bgn, write_group, 1,
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PASS_ALL_BITS, &bit_chk,
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0)) {
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/* USE Set current end of the window */
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/* Set current end of the window. */
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end_curr = -d;
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/*
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* If a starting edge of our window has not been seen
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@ -3003,26 +3001,26 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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end_best = end_curr;
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}
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} else {
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/* We just saw a failing test. Reset temp edge */
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/* We just saw a failing test. Reset temp edge. */
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bgn_curr = IO_IO_OUT1_DELAY_MAX + 1;
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end_curr = IO_IO_OUT1_DELAY_MAX + 1;
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}
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}
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/* Reset DM delay chains to 0 */
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/* Reset DM delay chains to 0. */
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scc_mgr_apply_group_dm_out1_delay(0);
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/*
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* Check to see if the current window nudges up aganist 0 delay.
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* If so we need to continue the search by shifting DQS otherwise DQS
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* search begins as a new search. */
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* search begins as a new search.
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*/
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if (end_curr != 0) {
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bgn_curr = IO_IO_OUT1_DELAY_MAX + 1;
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end_curr = IO_IO_OUT1_DELAY_MAX + 1;
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}
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/* Search for the/part of the window with DQS shifts */
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/* Search for the/part of the window with DQS shifts. */
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for (d = 0; d <= IO_IO_OUT1_DELAY_MAX - new_dqs; d += DELTA_D) {
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/*
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* Note: This only shifts DQS, so are we limiting ourselve to
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@ -3035,7 +3033,7 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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if (rw_mgr_mem_calibrate_write_test(rank_bgn, write_group, 1,
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PASS_ALL_BITS, &bit_chk,
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0)) {
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/* USE Set current end of the window */
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/* Set current end of the window. */
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end_curr = d;
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/*
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* If a beginning edge of our window has not been seen
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@ -3054,13 +3052,15 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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end_best = end_curr;
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}
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} else {
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/* We just saw a failing test. Reset temp edge */
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/* We just saw a failing test. Reset temp edge. */
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bgn_curr = IO_IO_OUT1_DELAY_MAX + 1;
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end_curr = IO_IO_OUT1_DELAY_MAX + 1;
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/* Early exit optimization: if ther remaining delay
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chain space is less than already seen largest window
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we can exit */
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/*
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* Early exit optimization: if the remaining delay
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* chain space is less than already seen largest
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* window we can exit.
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*/
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if ((win_best-1) >
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(IO_IO_OUT1_DELAY_MAX - new_dqs - d)) {
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break;
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@ -3068,26 +3068,26 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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}
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}
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/* assign left and right edge for cal and reporting; */
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left_edge[0] = -1*bgn_best;
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/* Assign left and right edge for cal and reporting. */
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left_edge[0] = -1 * bgn_best;
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right_edge[0] = end_best;
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debug_cond(DLEVEL == 2, "%s:%d dm_calib: left=%d right=%d\n", __func__,
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__LINE__, left_edge[0], right_edge[0]);
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debug_cond(DLEVEL == 2, "%s:%d dm_calib: left=%d right=%d\n",
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__func__, __LINE__, left_edge[0], right_edge[0]);
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/* Move DQS (back to orig) */
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/* Move DQS (back to orig). */
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scc_mgr_apply_group_dqs_io_and_oct_out1(write_group, new_dqs);
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/* Move DM */
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/* Find middle of window for the DM bit */
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/* Find middle of window for the DM bit. */
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mid = (left_edge[0] - right_edge[0]) / 2;
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/* only move right, since we are not moving DQS/DQ */
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/* Only move right, since we are not moving DQS/DQ. */
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if (mid < 0)
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mid = 0;
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/* dm_marign should fail if we never find a window */
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/* dm_marign should fail if we never find a window. */
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if (win_best == 0)
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dm_margin = -1;
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else
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@ -3096,21 +3096,23 @@ static uint32_t rw_mgr_mem_calibrate_writes_center(uint32_t rank_bgn,
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scc_mgr_apply_group_dm_out1_delay(mid);
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writel(0, &sdr_scc_mgr->update);
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debug_cond(DLEVEL == 2, "%s:%d dm_calib: left=%d right=%d mid=%d \
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dm_margin=%d\n", __func__, __LINE__, left_edge[0],
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right_edge[0], mid, dm_margin);
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/* Export values */
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debug_cond(DLEVEL == 2,
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"%s:%d dm_calib: left=%d right=%d mid=%d dm_margin=%d\n",
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__func__, __LINE__, left_edge[0], right_edge[0],
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mid, dm_margin);
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/* Export values. */
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gbl->fom_out += dq_margin + dqs_margin;
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debug_cond(DLEVEL == 2, "%s:%d write_center: dq_margin=%d \
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dqs_margin=%d dm_margin=%d\n", __func__, __LINE__,
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dq_margin, dqs_margin, dm_margin);
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debug_cond(DLEVEL == 2,
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"%s:%d write_center: dq_margin=%d dqs_margin=%d dm_margin=%d\n",
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__func__, __LINE__, dq_margin, dqs_margin, dm_margin);
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/*
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* Do not remove this line as it makes sure all of our
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* decisions have been applied.
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*/
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writel(0, &sdr_scc_mgr->update);
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return (dq_margin >= 0) && (dqs_margin >= 0) && (dm_margin >= 0);
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}
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