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ppc4xx: Correctly configure the GPIO pin muxing on Arches
Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO pin multiplexing correctly Signed-off-by: Stefan Roese <sr@denx.de>
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1 changed files with 11 additions and 1 deletions
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@ -570,6 +570,16 @@
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#define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */
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/*
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* Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO
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* pin multiplexing correctly
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*/
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#if defined(CONFIG_ARCHES)
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#define GPIO43_USE GPIO_SEL /* On Arches this pin is used as GPIO */
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#else
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#define GPIO43_USE GPIO_ALT1 /* On Glacier this pin is used as ALT1 -> PerCS3 */
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#endif
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/*
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* PPC4xx GPIO Configuration
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*/
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@ -698,7 +708,7 @@
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{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 IRQ(3) */ \
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{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 CS(1) */ \
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{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 CS(2) */ \
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{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \
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{GPIO1_BASE, GPIO_OUT, GPIO43_USE, GPIO_OUT_0},/* GPIO43 CS(3) DMAReq1 IRQ(10)*/ \
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{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO44 CS(4) DMAAck1 IRQ(11)*/ \
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{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO45 CS(5) EOT/TC1 IRQ(12)*/ \
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{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 PerAddr(5) DMAReq0 IRQ(13)*/ \
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