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at91rm9200dk, csb637: fix NAND related build problems
Tried fixing NAND support for the at91rm9200dk board; untested. Disabled NAND support in the csb637 board config file. Signed-off-by: Wolfgang Denk <wd@denx.de>
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1ca9950b46
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3 changed files with 12 additions and 17 deletions
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@ -25,6 +25,7 @@
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#ifndef AT91RM9200_H
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#define AT91RM9200_H
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#ifndef __ASSEMBLY__
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typedef volatile unsigned int AT91_REG; /* Hardware register definition */
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/*****************************************************************************/
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@ -780,4 +781,5 @@ typedef struct _AT91S_PDC
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#define AT91C_PIOB_ODR ((AT91_REG *) 0xFFFFF614) /* (PIOB) Output Disable Registerr */
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#define AT91C_PIOB_PDSR ((AT91_REG *) 0xFFFFF63C) /* (PIOB) Pin Data Status Register */
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* AT91RM9200_H */
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@ -112,16 +112,11 @@
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NAND
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_MISC
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#undef CONFIG_CMD_LOADS
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#define CFG_NAND_LEGACY
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#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#define SECTORSIZE 512
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@ -137,6 +132,7 @@
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#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
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#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
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#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
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#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
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#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
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@ -114,17 +114,11 @@
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_JFFS2
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#define CONFIG_CMD_PING
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#undef CONFIG_CMD_BDI
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_AUTOSCRIPT
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_MISC
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#undef CONFIG_CMD_LOADS
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#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */
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#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#define SECTORSIZE 512
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@ -140,6 +134,7 @@
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#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
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#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
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#include <asm/arch/AT91RM9200.h> /* needed for port definitions */
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#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0)
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#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0)
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@ -155,6 +150,8 @@
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#define NAND_CTL_CLRCLE(nandptr)
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#define NAND_CTL_SETCLE(nandptr)
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#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x4000000 /* 64 megs */
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