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P2571: dts: Add DT file for Tegra210 P2571 board

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Based on T124 Venice2. SDMMC1 is SD-card slot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Tom Warren 2015-02-13 14:39:53 -07:00
parent 7aaa5a60ce
commit 3cee35f841
2 changed files with 108 additions and 1 deletions
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3
arch/arm/dts/Makefile
View file

@ -32,7 +32,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra114-dalmore.dtb \
tegra124-jetson-tk1.dtb \
tegra124-nyan-big.dtb \
tegra124-venice2.dtb
tegra124-venice2.dtb \
tegra210-p2571.dtb
dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-ph1-sld3-ref.dtb \
uniphier-ph1-pro4-ref.dtb \

106
arch/arm/dts/tegra210-p2571.dts Normal file
View file

@ -0,0 +1,106 @@
/dts-v1/;
#include "tegra210.dtsi"
/ {
model = "NVIDIA P2571";
compatible = "nvidia,p2571", "nvidia,tegra210";
chosen {
stdout-path = &uarta;
};
aliases {
i2c0 = "/i2c@0,7000d000";
i2c1 = "/i2c@0,7000c000";
i2c2 = "/i2c@0,7000c400";
i2c3 = "/i2c@0,7000c500";
i2c4 = "/i2c@0,7000c700";
i2c5 = "/i2c@0,7000d100";
sdhci0 = "/sdhci@0,700b0600";
sdhci1 = "/sdhci@0,700b0000";
spi0 = "/spi@0,7000d400";
spi1 = "/spi@0,7000da00";
spi2 = "/spi@0,70410000";
usb0 = "/usb@0,7d000000";
};
memory {
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
i2c@0,7000c000 {
status = "okay";
clock-frequency = <100000>;
};
i2c@0,7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@0,7000c500 {
status = "okay";
clock-frequency = <100000>;
};
i2c@0,7000c700 {
status = "okay";
clock-frequency = <100000>;
};
i2c@0,7000d000 {
status = "okay";
clock-frequency = <400000>;
};
i2c@0,7000d100 {
status = "okay";
clock-frequency = <400000>;
};
spi@0,7000d400 {
status = "okay";
spi-max-frequency = <25000000>;
};
spi@0,7000da00 {
status = "okay";
spi-max-frequency = <25000000>;
};
spi@0,70410000 {
status = "okay";
spi-max-frequency = <24000000>;
};
sdhci@0,700b0000 {
status = "okay";
cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
bus-width = <4>;
};
sdhci@0,700b0600 {
status = "okay";
bus-width = <8>;
};
usb@0,7d000000 {
status = "okay";
dr_mode = "otg";
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
clk32k_in: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
};