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Merge branch 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging

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* 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging:
  LMB: Fix undefined lmb_reserve() on non-lmb platforms
  MIPS: fix endianess handling
  MIPS: fix inconsistency in config option for cache operation mode
  MIPS: board.c: fix init of flash data in bd_info
This commit is contained in:
Wolfgang Denk 2012-04-09 21:34:27 +02:00
commit 3f0675d1a5
6 changed files with 36 additions and 11 deletions
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6
README
View file

@ -374,6 +374,12 @@ The following options need to be configured:
Defines the string to utilize when trying to match PCIe device
tree nodes for the given platform.
- Generic CPU options:
CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
Defines the endianess of the CPU. Implementation of those
values is arch specific.
- Intel Monahans options:
CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO

6
arch/mips/cpu/mips32/cache.S
View file

@ -30,6 +30,10 @@
#include <asm/addrspace.h>
#include <asm/cacheops.h>
#ifndef CONFIG_SYS_MIPS_CACHE_MODE
#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT
#endif
#define RA t8
/*
@ -224,7 +228,7 @@ LEAF(dcache_enable)
mfc0 t0, CP0_CONFIG
ori t0, CONF_CM_CMASK
xori t0, CONF_CM_CMASK
ori t0, CONF_CM_CACHABLE_NONCOHERENT
ori t0, CONFIG_SYS_MIPS_CACHE_MODE
mtc0 t0, CP0_CONFIG
jr ra
END(dcache_enable)

21
arch/mips/cpu/mips32/config.mk
View file

@ -27,14 +27,23 @@
# Note: Toolchains with binutils prior to v2.16
# are no longer supported by U-Boot MIPS tree!
#
MIPSFLAGS = -march=mips32r2
MIPSFLAGS := -march=mips32r2
# Handle special prefix in ELDK 4.0 toolchain
ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
ENDIANNESS = -EL
else
ENDIANNESS = -EB
ENDIANNESS := -EL
endif
MIPSFLAGS += $(ENDIANNESS)
ifdef CONFIG_SYS_LITTLE_ENDIAN
ENDIANNESS := -EL
endif
PLATFORM_CPPFLAGS += $(MIPSFLAGS)
ifdef CONFIG_SYS_BIG_ENDIAN
ENDIANNESS := -EB
endif
# Default to EB if no endianess is configured
ENDIANNESS ?= -EB
PLATFORM_CPPFLAGS += $(MIPSFLAGS) $(ENDIANNESS)
PLATFORM_LDFLAGS += $(ENDIANNESS)

10
arch/mips/lib/board.c
View file

@ -294,15 +294,19 @@ void board_init_r(gd_t *id, ulong dest_addr)
/* configure available FLASH banks */
size = flash_init();
display_flash_config(size);
bd->bi_flashsize = size;
#endif
bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
bd->bi_flashsize = size;
#if CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
bd->bi_flashoffset = monitor_flash_len; /* reserved area for U-Boot */
#else
bd->bi_flashoffset = 0;
#endif
#else
bd->bi_flashstart = 0;
bd->bi_flashsize = 0;
bd->bi_flashoffset = 0;
#endif
#ifdef CONFIG_CMD_NAND
puts("NAND: ");

2
boards.cfg
View file

@ -360,7 +360,7 @@ dbau1000 mips mips32 dbau1x00 -
dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100
dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500
dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550
dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550
dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550,SYS_LITTLE_ENDIAN
gth2 mips mips32 - - au1x00
pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000
incaip mips mips32 incaip - incaip

2
include/configs/pb1x00.h
View file

@ -46,6 +46,8 @@
#endif
#endif
#define CONFIG_SYS_LITTLE_ENDIAN
#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */