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https://github.com/Fishwaldo/u-boot.git
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OMAP3: am3517_evm: Add NAND MTD partitions with UBI/UBIFS support
- Add required UBI/UBIFS config definitions - Add reasonable MTD partition layout - Remove JFFS2 config definitions - Drop some CFI verbage and definitions - Make comment 'one-liners' truly one line - Improve readability and content arrangement Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Derald D. Woods
Tom Rini
parent
138daa7b36
commit
3f53e619f0
2 changed files with 249 additions and 254 deletions
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@ -4,9 +4,11 @@ CONFIG_TARGET_AM3517_EVM=y
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CONFIG_SPL=y
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CONFIG_FIT=y
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CONFIG_SYS_PROMPT="AM3517_EVM # "
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CONFIG_SYS_EXTRA_OPTIONS="NAND"
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_GPIO=y
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CONFIG_SYS_NS16550=y
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@ -13,14 +13,17 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* High Level Configuration Options */
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#define CONFIG_OMAP
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#define CONFIG_OMAP_COMMON
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#define CONFIG_SYS_CACHELINE_SIZE 64
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/*
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* High Level Configuration Options
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*/
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#define CONFIG_OMAP 1 /* in a TI OMAP core */
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#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
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#define CONFIG_OMAP_COMMON
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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/* Common ARM Erratas */
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#define CONFIG_ARM_ERRATA_454179
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#define CONFIG_ARM_ERRATA_430973
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@ -28,59 +31,48 @@
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#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
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/*
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* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
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* 64 bytes before this address should be set aside for u-boot.img's
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* header. That is 0x800FFFC0--0x80100000 should not be used for any
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* other needs.
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*/
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#define CONFIG_SYS_TEXT_BASE 0x80100000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#include <asm/arch/omap.h>
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/*
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* Display CPU and Board information
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*/
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#define CONFIG_DISPLAY_CPUINFO 1
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#define CONFIG_DISPLAY_BOARDINFO 1
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/* Display CPU and Board information */
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_OF_LIBFDT
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#define CONFIG_MISC_INIT_R
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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/* Clock Defines */
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#define V_OSCK 26000000 /* Clock output from T2 */
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#define V_SCLK (V_OSCK >> 1)
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#define CONFIG_MISC_INIT_R
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (16 << 20)
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#define CONFIG_OF_LIBFDT
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/* Hardware drivers */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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#define CONFIG_REVISION_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
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/*
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* DDR related
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*/
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#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
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/*
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* Hardware drivers
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*/
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/*
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* OMAP GPIO configuration
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*/
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/* OMAP GPIO configuration */
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#define CONFIG_OMAP_GPIO
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/*
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* NS16550 Configuration
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*/
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/* NS16550 Configuration */
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#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
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/*
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* select serial console configuration
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*/
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/* select serial console configuration */
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#define CONFIG_CONS_INDEX 3
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#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
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#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
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@ -90,10 +82,12 @@
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
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115200}
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#define CONFIG_MMC 1
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#define CONFIG_GENERIC_MMC 1
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#define CONFIG_OMAP_HSMMC 1
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#define CONFIG_DOS_PARTITION 1
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/* SD/MMC */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_OMAP_HSMMC
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#define CONFIG_DOS_PARTITION
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/*
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* USB configuration
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@ -111,7 +105,6 @@
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#define CONFIG_USB_STORAGE
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#define CONGIG_CMD_STORAGE
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#define CONFIG_CMD_FAT
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#ifdef CONFIG_USB_KEYBOARD
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#define CONFIG_SYS_USB_EVENT_POLL
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@ -129,30 +122,29 @@
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#endif /* CONFIG_USB_MUSB_AM35X */
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/* commands to include */
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#define CONFIG_CMD_EXT2 /* EXT2 Support */
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_EXT4
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#define CONFIG_CMD_EXT4_WRITE
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#define CONFIG_CMD_FS_GENERIC
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#define CONFIG_CMD_PART
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_BOOTZ
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#define CONFIG_CMD_I2C /* I2C serial bus support */
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#define CONFIG_CMD_MMC /* MMC support */
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#define CONFIG_CMD_NAND /* NAND support */
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_DHCP
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#undef CONFIG_CMD_PING
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_SYS_NO_FLASH
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/* I2C */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
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#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
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#define CONFIG_SYS_I2C_OMAP34XX
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/*
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* Ethernet
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*/
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/* Ethernet */
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_DRIVER_TI_EMAC_USE_RMII
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#define CONFIG_MII
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@ -162,199 +154,22 @@
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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/*
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* Board NAND Info.
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*/
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/* Board NAND Info. */
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#ifdef CONFIG_NAND
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_NAND_OMAP_GPMC_PREFETCH
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#define CONFIG_BCH
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#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
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#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
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#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
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#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
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#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
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/* to access nand */
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#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
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/* to access */
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/* nand at CS0 */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
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/* NAND devices */
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#define CONFIG_JFFS2_NAND
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/* nand device jffs2 lives on */
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#define CONFIG_JFFS2_DEV "nand0"
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/* start of jffs2 partition */
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#define CONFIG_JFFS2_PART_OFFSET 0x680000
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#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
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/* Environment information */
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#define CONFIG_BOOTDELAY 10
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x82000000\0" \
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"console=ttyO2,115200n8\0" \
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"fdtfile=am3517-evm.dtb\0" \
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"fdtaddr=0x82C00000\0" \
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"vram=16M\0" \
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"bootenv=uEnv.txt\0" \
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"cmdline=\0" \
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"optargs=\0" \
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"mmcdev=0\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p2 rw\0" \
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"mmcrootfstype=ext4 rootwait fixrtc\0" \
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"mmcargs=setenv bootargs console=${console} " \
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"${optargs} " \
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"root=${mmcroot} " \
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"rootfstype=${mmcrootfstype} " \
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"${cmdline}\0" \
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"nandargs=setenv bootargs console=${console} " \
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"root=/dev/mtdblock4 rw " \
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"rootfstype=jffs2\0" \
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"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t ${loadaddr} ${filesize}\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source ${loadaddr}\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"bootz ${loadaddr} - ${fdtaddr}\0" \
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"nandboot=echo Booting from nand ...; " \
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"run nandargs; " \
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"nand read ${loadaddr} 280000 400000; " \
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"bootm ${loadaddr}\0" \
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"echo SD/MMC found on device $mmcdev; " \
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"if run loadbootenv; then " \
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"run importbootenv; " \
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"fi; " \
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"echo Checking if uenvcmd is set ...; " \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...; " \
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"run uenvcmd; " \
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"fi; " \
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"echo Running default loadimage ...; " \
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"setenv bootfile zImage; " \
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"if run loadimage; then " \
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"run loadfdt; " \
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"run mmcboot; " \
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"fi; " \
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"else run nandboot; fi"
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#define CONFIG_AUTO_COMPLETE 1
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 32 /* max number of command */
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/* args */
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/* Boot Argument Buffer Size */
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#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
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#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
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0x01F00000) /* 31MB */
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#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
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/* address */
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/*
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* AM3517 has 12 GP timers, they can be driven by the system clock
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* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
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* This rate is divided by a local divisor.
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*/
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#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
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#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
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#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
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#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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/* **** PISMO SUPPORT *** */
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#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
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/* on one chip */
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#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
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#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
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#if defined(CONFIG_CMD_NAND)
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#define CONFIG_SYS_FLASH_BASE NAND_BASE
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#endif
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/* Monitor at start of flash */
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_NAND_OMAP_GPMC
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#define CONFIG_ENV_IS_IN_NAND 1
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#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
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#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
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#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
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/*-----------------------------------------------------------------------
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* CFI FLASH driver setup
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*/
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/* timeout values are in ticks */
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#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
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#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
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/* Flash banks JFFS2 should use */
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#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
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CONFIG_SYS_MAX_NAND_DEVICE)
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#define CONFIG_SYS_JFFS2_MEM_NAND
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/* use flash_info[2] */
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#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
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#define CONFIG_SYS_JFFS2_NUM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
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#define CONFIG_SYS_INIT_RAM_SIZE 0x800
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE - \
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GENERATED_GBL_DATA_SIZE)
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/* Defines for SPL */
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_NAND_SIMPLE
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#define CONFIG_SPL_TEXT_BASE 0x40200000
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#define CONFIG_SPL_MAX_SIZE (64 * 1024)
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#define CONFIG_SPL_BSS_START_ADDR 0x80000000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
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#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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#define CONFIG_SPL_LIBCOMMON_SUPPORT
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#define CONFIG_SPL_LIBDISK_SUPPORT
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_LIBGENERIC_SUPPORT
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_FAT_SUPPORT
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#define CONFIG_SPL_SERIAL_SUPPORT
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SPL_NAND_BASE
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#define CONFIG_SPL_NAND_DRIVERS
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#define CONFIG_SPL_NAND_ECC
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#define CONFIG_SPL_POWER_SUPPORT
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#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
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/* NAND boot config */
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#define CONFIG_BCH
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#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_PAGE_COUNT 64
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@ -376,15 +191,193 @@
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#define CONFIG_SYS_NAND_MAX_ECCPOS 56
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
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#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
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#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
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/* NAND block size is 128 KiB. Synchronize these values with
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* corresponding Device Tree entries in Linux:
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* MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
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* U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
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* U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
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* Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
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* DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
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* RootFS Remaining Flash Space @ 0xB20000
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*/
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#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
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#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
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"512k(MLO)," \
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"1920k(u-boot)," \
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"256k(u-boot-env)," \
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"8m(kernel)," \
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"512k(dtb)," \
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"-(rootfs)"
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#else
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||||
#define MTDIDS_DEFAULT
|
||||
#define MTDPARTS_DEFAULT
|
||||
#endif /* CONFIG_NAND */
|
||||
|
||||
/* Environment information */
|
||||
#define CONFIG_BOOTDELAY 10
|
||||
|
||||
#define CONFIG_BOOTFILE "uImage"
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"loadaddr=0x82000000\0" \
|
||||
"console=ttyO2,115200n8\0" \
|
||||
"fdtfile=am3517-evm.dtb\0" \
|
||||
"fdtaddr=0x82C00000\0" \
|
||||
"vram=16M\0" \
|
||||
"bootenv=uEnv.txt\0" \
|
||||
"cmdline=\0" \
|
||||
"optargs=\0" \
|
||||
"mtdids=" MTDIDS_DEFAULT "\0" \
|
||||
"mtdparts=" MTDPARTS_DEFAULT "\0" \
|
||||
"mmcdev=0\0" \
|
||||
"mmcpart=1\0" \
|
||||
"mmcroot=/dev/mmcblk0p2 rw\0" \
|
||||
"mmcrootfstype=ext4 rootwait fixrtc\0" \
|
||||
"mmcargs=setenv bootargs console=${console} " \
|
||||
"${mtdparts} " \
|
||||
"${optargs} " \
|
||||
"root=${mmcroot} " \
|
||||
"rootfstype=${mmcrootfstype} " \
|
||||
"${cmdline}\0" \
|
||||
"nandargs=setenv bootargs console=${console} " \
|
||||
"${mtdparts} " \
|
||||
"${optargs} " \
|
||||
"root=ubi0:rootfs rw ubi.mtd=rootfs " \
|
||||
"rootfstype=ubifs rootwait " \
|
||||
"${cmdline}\0" \
|
||||
"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
|
||||
"importbootenv=echo Importing environment from mmc ...; " \
|
||||
"env import -t ${loadaddr} ${filesize}\0" \
|
||||
"bootscript=echo Running bootscript from mmc ...; " \
|
||||
"source ${loadaddr}\0" \
|
||||
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
|
||||
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
|
||||
"mmcboot=echo Booting from mmc ...; " \
|
||||
"run mmcargs; " \
|
||||
"bootz ${loadaddr} - ${fdtaddr}\0" \
|
||||
"nandboot=echo Booting from nand ...; " \
|
||||
"run nandargs; " \
|
||||
"nand read ${loadaddr} 2a0000 800000; " \
|
||||
"nand read ${fdtaddr} aa0000 80000; " \
|
||||
"bootm ${loadaddr} - ${fdtaddr}\0" \
|
||||
|
||||
#define CONFIG_BOOTCOMMAND \
|
||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
||||
"echo SD/MMC found on device $mmcdev; " \
|
||||
"if run loadbootenv; then " \
|
||||
"run importbootenv; " \
|
||||
"fi; " \
|
||||
"echo Checking if uenvcmd is set ...; " \
|
||||
"if test -n $uenvcmd; then " \
|
||||
"echo Running uenvcmd ...; " \
|
||||
"run uenvcmd; " \
|
||||
"fi; " \
|
||||
"echo Running default loadimage ...; " \
|
||||
"setenv bootfile zImage; " \
|
||||
"if run loadimage; then " \
|
||||
"run loadfdt; " \
|
||||
"run mmcboot; " \
|
||||
"fi; " \
|
||||
"else run nandboot; fi"
|
||||
|
||||
/* Miscellaneous configurable options */
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#define CONFIG_CMDLINE_EDITING
|
||||
#define CONFIG_VERSION_VARIABLE
|
||||
#define CONFIG_SYS_LONGHELP
|
||||
#define CONFIG_SYS_HUSH_PARSER
|
||||
#define CONFIG_PARTITION_UUIDS
|
||||
|
||||
/* We set the max number of command args high to avoid HUSH bugs. */
|
||||
#define CONFIG_SYS_MAXARGS 64
|
||||
|
||||
/* Console I/O Buffer Size */
|
||||
#define CONFIG_SYS_CBSIZE 512
|
||||
/* Print Buffer Size */
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
|
||||
+ sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
/* Boot Argument Buffer Size */
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
|
||||
/* memtest works on */
|
||||
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
|
||||
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
|
||||
0x01F00000) /* 31MB */
|
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
|
||||
/* address */
|
||||
|
||||
/*
|
||||
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
|
||||
* 64 bytes before this address should be set aside for u-boot.img's
|
||||
* header. That is 0x800FFFC0--0x80100000 should not be used for any
|
||||
* other needs.
|
||||
* AM3517 has 12 GP timers, they can be driven by the system clock
|
||||
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
|
||||
* This rate is divided by a local divisor.
|
||||
*/
|
||||
#define CONFIG_SYS_TEXT_BASE 0x80100000
|
||||
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
|
||||
#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
|
||||
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
|
||||
|
||||
/* Physical Memory Map */
|
||||
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
|
||||
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
|
||||
#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
|
||||
CONFIG_SYS_INIT_RAM_SIZE - \
|
||||
GENERATED_GBL_DATA_SIZE)
|
||||
|
||||
/* FLASH and environment organization */
|
||||
|
||||
/* **** PISMO SUPPORT *** */
|
||||
#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
|
||||
/* on one chip */
|
||||
#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
|
||||
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
|
||||
|
||||
#if defined(CONFIG_NAND)
|
||||
#define CONFIG_SYS_FLASH_BASE NAND_BASE
|
||||
#endif
|
||||
|
||||
/* Monitor at start of flash */
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
|
||||
|
||||
#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
|
||||
#define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
|
||||
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
|
||||
#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
|
||||
#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
|
||||
#define CONFIG_ENV_IS_IN_NAND
|
||||
|
||||
/* Defines for SPL */
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
#define CONFIG_SPL_BOARD_INIT
|
||||
#define CONFIG_SPL_NAND_SIMPLE
|
||||
#define CONFIG_SPL_TEXT_BASE 0x40200000
|
||||
#define CONFIG_SPL_MAX_SIZE (64 * 1024)
|
||||
|
||||
#define CONFIG_SPL_BSS_START_ADDR 0x80000000
|
||||
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
|
||||
|
||||
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
|
||||
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
|
||||
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
|
||||
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
|
||||
|
||||
#define CONFIG_SPL_LIBCOMMON_SUPPORT
|
||||
#define CONFIG_SPL_LIBDISK_SUPPORT
|
||||
#define CONFIG_SPL_I2C_SUPPORT
|
||||
#define CONFIG_SPL_LIBGENERIC_SUPPORT
|
||||
#define CONFIG_SPL_MMC_SUPPORT
|
||||
#define CONFIG_SPL_FAT_SUPPORT
|
||||
#define CONFIG_SPL_SERIAL_SUPPORT
|
||||
#define CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_SPL_NAND_BASE
|
||||
#define CONFIG_SPL_NAND_DRIVERS
|
||||
#define CONFIG_SPL_NAND_ECC
|
||||
#define CONFIG_SPL_MTD_SUPPORT
|
||||
#define CONFIG_SPL_POWER_SUPPORT
|
||||
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue