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arm, davinci: add workaround for not resetting DMA bus and VPSS modules
The Buffer Logic of VPSS is Not Reset by System Reset Pin, see http://www.ti.com/lit/er/sprz316b/sprz316b.pdf chapter Advisory 1.2.1 on page 9. Add workaroundcode proposed in the errata. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <tom.rini@gmail.com>
This commit is contained in:
parent
f59021791b
commit
3f84108b99
4 changed files with 61 additions and 4 deletions
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@ -254,7 +254,7 @@ int dm365_ddr_setup(void)
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return 0;
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return 0;
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}
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}
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void dm365_vpss_sync_reset(void)
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static void dm365_vpss_sync_reset(void)
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{
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{
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unsigned int PdNum = 0;
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unsigned int PdNum = 0;
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@ -276,11 +276,52 @@ void dm365_vpss_sync_reset(void)
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;
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;
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}
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}
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void dm365_por_reset(void)
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static void dm365_por_reset(void)
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{
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{
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struct davinci_timer *wdog =
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(struct davinci_timer *)DAVINCI_WDOG_BASE;
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if (readl(&dv_pll0_regs->rstype) &
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if (readl(&dv_pll0_regs->rstype) &
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(PLL_RSTYPE_POR | PLL_RSTYPE_XWRST))
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(PLL_RSTYPE_POR | PLL_RSTYPE_XWRST)) {
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dm365_vpss_sync_reset();
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dm365_vpss_sync_reset();
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writel(DV_TMPBUF_VAL, TMPBUF);
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setbits_le32(TMPSTATUS, FLAG_PORRST);
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writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1);
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writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2);
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while (1);
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}
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}
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static void dm365_wdt_reset(void)
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{
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struct davinci_timer *wdog =
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(struct davinci_timer *)DAVINCI_WDOG_BASE;
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if (readl(TMPBUF) != DV_TMPBUF_VAL) {
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writel(DV_TMPBUF_VAL, TMPBUF);
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setbits_le32(TMPSTATUS, FLAG_PORRST);
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setbits_le32(TMPSTATUS, FLAG_FLGOFF);
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dm365_waitloop(100);
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dm365_vpss_sync_reset();
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writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1);
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writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2);
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while (1);
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}
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}
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static void dm365_wdt_flag_on(void)
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{
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/* VPSS_CLKMD 1:2 */
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clrbits_le32(&dv_sys_module_regs->vpss_clkctl,
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VPSS_CLK_CTL_VPSS_CLKMD);
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writel(0, TMPBUF);
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setbits_le32(TMPSTATUS, FLAG_FLGON);
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}
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}
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void dm365_psc_init(void)
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void dm365_psc_init(void)
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@ -382,6 +423,9 @@ void dm36x_lowlevel_init(ulong bootflag)
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writel(0xffffffff, &dv_aintc_regs->irq0);
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writel(0xffffffff, &dv_aintc_regs->irq0);
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writel(0xffffffff, &dv_aintc_regs->irq1);
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writel(0xffffffff, &dv_aintc_regs->irq1);
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dm365_por_reset();
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dm365_wdt_reset();
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/* System PSC setup - enable all */
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/* System PSC setup - enable all */
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dm365_psc_init();
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dm365_psc_init();
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@ -418,6 +462,8 @@ void dm36x_lowlevel_init(ulong bootflag)
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puts("emif init\n");
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puts("emif init\n");
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dm365_emif_init();
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dm365_emif_init();
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dm365_wdt_flag_on();
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#if defined(CONFIG_POST)
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#if defined(CONFIG_POST)
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/*
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/*
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* Do memory tests, calls arch_memory_failure_handle()
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* Do memory tests, calls arch_memory_failure_handle()
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@ -32,7 +32,6 @@ void dm365_waitloop(unsigned long loopcnt);
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int dm365_pll1_init(unsigned long pllmult, unsigned long prediv);
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int dm365_pll1_init(unsigned long pllmult, unsigned long prediv);
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int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
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int dm365_pll2_init(unsigned long pllm, unsigned long prediv);
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int dm365_ddr_setup(void);
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int dm365_ddr_setup(void);
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void dm365_por_reset(void);
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void dm365_psc_init(void);
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void dm365_psc_init(void);
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void dm365_pinmux_ctl(unsigned long offset, unsigned long mask,
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void dm365_pinmux_ctl(unsigned long offset, unsigned long mask,
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unsigned long value);
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unsigned long value);
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@ -587,6 +587,15 @@ static inline int get_async3_src(void)
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#include <asm/arch/psc_defs.h>
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#include <asm/arch/psc_defs.h>
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#include <asm/arch/syscfg_defs.h>
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#include <asm/arch/syscfg_defs.h>
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#include <asm/arch/timer_defs.h>
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#include <asm/arch/timer_defs.h>
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#define TMPBUF 0x00017ff8
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#define TMPSTATUS 0x00017ff0
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#define DV_TMPBUF_VAL 0x591b3ed7
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#define FLAG_PORRST 0x00000001
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#define FLAG_WDTRST 0x00000002
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#define FLAG_FLGON 0x00000004
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#define FLAG_FLGOFF 0x00000010
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#endif
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#endif
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struct davinci_rtc {
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struct davinci_rtc {
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@ -37,6 +37,9 @@ struct davinci_timer {
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u_int32_t wdtcr;
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u_int32_t wdtcr;
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};
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};
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#define DV_WDT_ENABLE_SYS_RESET 0x00020000
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#define DV_WDT_TRIGGER_SYS_RESET 0x00020002
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#ifdef CONFIG_HW_WATCHDOG
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#ifdef CONFIG_HW_WATCHDOG
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void davinci_hw_watchdog_enable(void);
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void davinci_hw_watchdog_enable(void);
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void davinci_hw_watchdog_reset(void);
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void davinci_hw_watchdog_reset(void);
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