mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-31 11:31:32 +00:00
Merge with /home/wd/git/u-boot/master
This commit is contained in:
commit
46044b4817
4 changed files with 163 additions and 155 deletions
2
Makefile
2
Makefile
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@ -1737,7 +1737,7 @@ clean:
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rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
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rm -f tools/gdb/astest tools/gdb/gdbcont tools/gdb/gdbsend
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rm -f tools/env/fw_printenv tools/env/fw_setenv
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rm -f tools/env/fw_printenv tools/env/fw_setenv
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rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
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rm -f board/cray/L1/bootscript.c board/cray/L1/bootscript.image
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rm -f board/trab/trab_fkt
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rm -f board/trab/trab_fkt board/voiceblue/eeprom
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clobber: clean
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clobber: clean
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find . -type f \( -name .depend \
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find . -type f \( -name .depend \
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@ -38,12 +38,12 @@
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* Utility to send the preamble, address, and register (common to read
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* Utility to send the preamble, address, and register (common to read
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* and write).
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* and write).
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*/
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*/
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static void miiphy_pre(char read,
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static void miiphy_pre (char read, unsigned char addr, unsigned char reg)
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unsigned char addr,
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unsigned char reg)
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{
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{
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int j; /* counter */
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int j; /* counter */
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#ifndef CONFIG_EP8248
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volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT);
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volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT);
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#endif
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/*
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/*
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* Send a 32 bit preamble ('1's) with an extra '1' bit for good measure.
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* Send a 32 bit preamble ('1's) with an extra '1' bit for good measure.
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@ -55,8 +55,7 @@ static void miiphy_pre(char read,
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MDIO_ACTIVE;
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MDIO_ACTIVE;
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MDIO (1);
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MDIO (1);
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for(j = 0; j < 32; j++)
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for (j = 0; j < 32; j++) {
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{
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MDC (0);
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MDC (0);
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MIIDELAY;
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MIIDELAY;
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MDC (1);
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MDC (1);
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@ -64,21 +63,33 @@ static void miiphy_pre(char read,
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}
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}
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/* send the start bit (01) and the read opcode (10) or write (10) */
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/* send the start bit (01) and the read opcode (10) or write (10) */
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MDC(0); MDIO(0); MIIDELAY; MDC(1); MIIDELAY;
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MDC (0);
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MDC(0); MDIO(1); MIIDELAY; MDC(1); MIIDELAY;
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MDIO (0);
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MDC(0); MDIO(read); MIIDELAY; MDC(1); MIIDELAY;
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MIIDELAY;
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MDC(0); MDIO(!read); MIIDELAY; MDC(1); MIIDELAY;
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MDC (1);
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MIIDELAY;
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MDC (0);
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MDIO (1);
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MIIDELAY;
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MDC (1);
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MIIDELAY;
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MDC (0);
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MDIO (read);
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MIIDELAY;
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MDC (1);
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MIIDELAY;
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MDC (0);
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MDIO (!read);
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MIIDELAY;
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MDC (1);
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MIIDELAY;
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/* send the PHY address */
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/* send the PHY address */
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for(j = 0; j < 5; j++)
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for (j = 0; j < 5; j++) {
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{
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MDC (0);
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MDC (0);
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if((addr & 0x10) == 0)
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if ((addr & 0x10) == 0) {
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{
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MDIO (0);
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MDIO (0);
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}
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} else {
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else
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{
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MDIO (1);
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MDIO (1);
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}
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}
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MIIDELAY;
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MIIDELAY;
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@ -88,15 +99,11 @@ static void miiphy_pre(char read,
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}
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}
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/* send the register address */
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/* send the register address */
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for(j = 0; j < 5; j++)
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for (j = 0; j < 5; j++) {
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{
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MDC (0);
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MDC (0);
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if((reg & 0x10) == 0)
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if ((reg & 0x10) == 0) {
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{
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MDIO (0);
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MDIO (0);
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}
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} else {
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else
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{
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MDIO (1);
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MDIO (1);
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}
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}
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MIIDELAY;
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MIIDELAY;
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@ -114,13 +121,13 @@ static void miiphy_pre(char read,
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* Returns:
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* Returns:
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* 0 on success
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* 0 on success
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*/
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*/
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int miiphy_read(unsigned char addr,
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int miiphy_read (unsigned char addr, unsigned char reg, unsigned short *value)
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unsigned char reg,
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unsigned short *value)
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{
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{
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short rdreg; /* register working value */
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short rdreg; /* register working value */
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int j; /* counter */
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int j; /* counter */
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#ifndef CONFIG_EP8248
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volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT);
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volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT);
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#endif
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miiphy_pre (1, addr, reg);
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miiphy_pre (1, addr, reg);
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@ -132,11 +139,9 @@ int miiphy_read(unsigned char addr,
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MIIDELAY;
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MIIDELAY;
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/* check the turnaround bit: the PHY should be driving it to zero */
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/* check the turnaround bit: the PHY should be driving it to zero */
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if(MDIO_READ != 0)
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if (MDIO_READ != 0) {
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{
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/* puts ("PHY didn't drive TA low\n"); */
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/* puts ("PHY didn't drive TA low\n"); */
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for(j = 0; j < 32; j++)
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for (j = 0; j < 32; j++) {
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{
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MDC (0);
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MDC (0);
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MIIDELAY;
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MIIDELAY;
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MDC (1);
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MDC (1);
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@ -150,8 +155,7 @@ int miiphy_read(unsigned char addr,
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/* read 16 bits of register data, MSB first */
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/* read 16 bits of register data, MSB first */
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rdreg = 0;
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rdreg = 0;
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for(j = 0; j < 16; j++)
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for (j = 0; j < 16; j++) {
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{
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MDC (1);
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MDC (1);
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MIIDELAY;
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MIIDELAY;
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rdreg <<= 1;
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rdreg <<= 1;
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@ -184,29 +188,33 @@ int miiphy_read(unsigned char addr,
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* Returns:
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* Returns:
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* 0 on success
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* 0 on success
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*/
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*/
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int miiphy_write(unsigned char addr,
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int miiphy_write (unsigned char addr, unsigned char reg, unsigned short value)
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unsigned char reg,
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unsigned short value)
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{
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{
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int j; /* counter */
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int j; /* counter */
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#ifndef CONFIG_EP8248
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volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT);
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volatile ioport_t *iop = ioport_addr ((immap_t *) CFG_IMMR, MDIO_PORT);
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#endif
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miiphy_pre (0, addr, reg);
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miiphy_pre (0, addr, reg);
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/* send the turnaround (10) */
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/* send the turnaround (10) */
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MDC(0); MDIO(1); MIIDELAY; MDC(1); MIIDELAY;
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MDC (0);
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MDC(0); MDIO(0); MIIDELAY; MDC(1); MIIDELAY;
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MDIO (1);
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MIIDELAY;
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MDC (1);
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MIIDELAY;
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MDC (0);
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MDIO (0);
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MIIDELAY;
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MDC (1);
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MIIDELAY;
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/* write 16 bits of register data, MSB first */
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/* write 16 bits of register data, MSB first */
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for(j = 0; j < 16; j++)
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for (j = 0; j < 16; j++) {
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{
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MDC (0);
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MDC (0);
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if((value & 0x00008000) == 0)
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if ((value & 0x00008000) == 0) {
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{
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MDIO (0);
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MDIO (0);
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}
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} else {
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else
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{
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MDIO (1);
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MDIO (1);
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}
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}
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MIIDELAY;
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MIIDELAY;
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@ -128,7 +128,7 @@
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#define CONFIG_BAUDRATE 9600 /* STD Baudrate */
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#define CONFIG_BAUDRATE 9600 /* STD Baudrate */
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_BOOTDELAY 5
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/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
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/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
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#define CONFIG_BOOT_RETRY_TIME -10 /* feature is avaiable but not enabled */
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/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
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#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
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#define CONFIG_BOOTCOMMAND "diskboot 400000 0:1; bootm" /* autoboot command */
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@ -112,7 +112,7 @@
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_BOOTDELAY 5
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/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
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/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
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#define CONFIG_BOOT_RETRY_TIME -10 /* feature is avaiable but not enabled */
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/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
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#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
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