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clk: rk3399: Fix eMMC get_clk reg offset

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Actual eMMC get_clk register is clksel_con22 instead of
clksel_con21.

Fix it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jagan Teki 2020-05-24 22:13:15 +05:30 • committed by Kever Yang
parent 97de3935aa
commit 4648108c63
1 changed files with 1 additions and 1 deletions
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2
drivers/clk/rockchip/clk_rk3399.c
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@ -728,7 +728,7 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id)
div = 2;
break;
case SCLK_EMMC:
con = readl(&cru->clksel_con[21]);
con = readl(&cru->clksel_con[22]);
div = 1;
break;
default: