mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-18 13:11:31 +00:00
ppc4xx: Add pci_pre_init() for 405 boards
This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
This commit is contained in:
parent
6f35c53166
commit
466fff1a7b
38 changed files with 46 additions and 77 deletions
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@ -416,7 +416,7 @@ int testdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long addr;
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@ -457,7 +457,7 @@ int pci_pre_init(struct pci_controller *hose)
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -207,14 +207,14 @@ long int fixed_sdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long strap;
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/*--------------------------------------------------------------------------+
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* The ebony board is always configured as the host & requires the
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* PCI arbiter to be enabled.
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* The ebony board is always configured as the host & requires the
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* PCI arbiter to be enabled.
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*--------------------------------------------------------------------------*/
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strap = mfdcr(cpc0_strp1);
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if ((strap & 0x00100000) == 0) {
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@ -224,7 +224,7 @@ int pci_pre_init(struct pci_controller *hose)
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -292,7 +292,7 @@ int testdram (void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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@ -309,7 +309,7 @@ int pci_pre_init(struct pci_controller * hose )
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -161,7 +161,7 @@ int testdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init( struct pci_controller *hose )
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{
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unsigned long strap;
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@ -179,7 +179,7 @@ int pci_pre_init( struct pci_controller *hose )
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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@ -306,7 +306,7 @@ long int fixed_sdram (void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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@ -323,7 +323,7 @@ int pci_pre_init(struct pci_controller * hose )
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -426,23 +426,10 @@ int testdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long addr;
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#if 0
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/*--------------------------------------------------------------------------+
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* Cactus is always configured as the host & requires the
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* PCI arbiter to be enabled ???
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*--------------------------------------------------------------------------*/
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unsigned long strap;
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mfsdr(sdr_sdstp1, strap);
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if ((strap & SDR0_SDSTP1_PAE_MASK) == 0) {
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printf("PCI: SDR0_STRP1[PAE] not set.\n");
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printf("PCI: Configuration aborted.\n");
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return 0;
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}
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#endif
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/*-------------------------------------------------------------------------+
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| Set priority for all PLB3 devices to 0.
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@ -480,7 +467,7 @@ int pci_pre_init(struct pci_controller *hose)
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -236,7 +236,7 @@ int testdram (void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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@ -253,7 +253,7 @@ int pci_pre_init(struct pci_controller * hose )
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -385,7 +385,7 @@ int testdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long addr;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -604,7 +604,7 @@ int testdram (void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -551,7 +551,7 @@ void ide_set_reset(int on)
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#endif /* CONFIG_CPCI405_VER2 */
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
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{
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unsigned char int_line = 0xff;
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hose->fixup_irq = cpci405_pci_fixup_irq;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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@ -304,7 +304,7 @@ int testdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long addr;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -217,7 +217,7 @@ int testdram(void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long addr;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -172,7 +172,7 @@ int testdram (void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -176,7 +176,7 @@ int misc_init_r (void)
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller *hose)
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{
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unsigned long strap;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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* certain pre-initialization actions.
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*
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************************************************************************/
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#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI)
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int pci_pre_init(struct pci_controller * hose )
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{
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unsigned long strap;
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#endif
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return 1;
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}
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#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
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#endif /* defined(CONFIG_PCI) */
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/*************************************************************************
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* pci_target_init
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@ -146,12 +146,13 @@ that maps in a single PCI I/O space and PCI memory space. The I/O
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space begins at PCI I/O address 0 and the PCI memory space is
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256 MB starting at PCI address CFG_PCI_TARGBASE. After the
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pci_controller structure is initialized, the cpu-specific code will
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call the routine pci_pre_init() if the CFG_PCI_PRE_INIT flag is
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defined. This routine is implemented by board-specific code & is where
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the board can over-ride/extend the default pci_controller structure
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settings and do other pre-initialization tasks. If pci_pre_init()
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returns a value of zero, PCI initialization is aborted; otherwise the
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controller structure is registered and initialization continues.
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call the routine pci_pre_init(). This routine is implemented by
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board-specific code & is where the board can over-ride/extend the
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default pci_controller structure settings and exspecially provide
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a routine to map the PCI interrupts and do other pre-initialization
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tasks. If pci_pre_init() returns a value of zero, PCI initialization
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is aborted; otherwise the controller structure is registered and
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initialization continues.
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The default 440GP PCI target configuration is minimal -- it assumes that
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the strapping registers are set as necessary. Since the strapping bits
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#include <linux/string.h>
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#include <asm/ptrace.h>
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#include <stdarg.h>
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#if defined(CONFIG_PCI) && defined(CONFIG_440)
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#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
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#include <pci.h>
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#endif
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#if defined(CONFIG_8xx)
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void pci_init_board(void);
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void pciinfo (int, int);
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#if defined(CONFIG_PCI) && defined(CONFIG_440)
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# if defined(CFG_PCI_PRE_INIT)
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#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
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int pci_pre_init (struct pci_controller * );
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# endif
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#endif
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#if defined(CONFIG_PCI) && defined(CONFIG_440)
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# if defined(CFG_PCI_TARGET_INIT)
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void pci_target_init (struct pci_controller *);
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# endif
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define CONFIG_PCI /* include pci support */
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#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */
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#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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/* resource configuration */
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define CONFIG_PCI /* include pci support */
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#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */
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#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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/* resource configuration */
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define CONFIG_PCI /* include pci support */
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#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */
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#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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/* resource configuration */
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#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
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#define CONFIG_PCI /* include pci support */
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#define CFG_PCI_PRE_INIT /* pci interrupt mapping etc. */
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#define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */
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#define CONFIG_PCI_PNP /* do pci plug-and-play */
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/* resource configuration */
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#define CFG_PCI_TARGBASE (CFG_PCI_MEMBASE)
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/* Board-specific PCI */
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#define CFG_PCI_PRE_INIT /* enable board pci_pre_init*/
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#define CFG_PCI_TARGET_INIT /* let board init pci target*/
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#define CFG_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
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#define CFG_PCI_TARGBASE (CFG_PCI_MEMBASE)
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/* Board-specific PCI */
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#define CFG_PCI_PRE_INIT /* enable board pci_pre_init*/
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#define CFG_PCI_TARGET_INIT /* let board init pci target*/
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#define CFG_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
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#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
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/* Board-specific PCI */
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#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
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#define CFG_PCI_TARGET_INIT /* let board init pci target */
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#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
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#define CONFIG_PCI_BOOTDELAY 1 /* enable pci bootdelay variable*/
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/* Board-specific PCI */
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#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
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#define CFG_PCI_TARGET_INIT /* let board init pci target */
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#define CFG_PCI_MASTER_INIT
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#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
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/* Board-specific PCI */
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#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
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#define CFG_PCI_TARGET_INIT
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||||
#define CFG_PCI_MASTER_INIT
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||||
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||||
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|
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@ -270,7 +270,6 @@
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#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT /* let board init pci target */
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||||
|
||||
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
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||||
|
|
|
@ -314,7 +314,6 @@
|
|||
#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT 1 /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT /* let board init pci target */
|
||||
#undef CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
|
@ -273,7 +273,6 @@
|
|||
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT
|
||||
#undef CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
|
@ -288,7 +288,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT
|
||||
#define CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
|
@ -294,7 +294,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT /* let board init pci target */
|
||||
|
||||
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
|
||||
|
|
|
@ -227,7 +227,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT /* let board init pci target */
|
||||
|
||||
#define CONFIG_DISABLE_PISE_TEST /* disable PISE test (PCIX only)*/
|
||||
|
|
|
@ -267,7 +267,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT
|
||||
#define CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
|
@ -371,7 +371,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT
|
||||
#define CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
|
@ -298,7 +298,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT /* let board init pci target */
|
||||
|
||||
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
|
||||
|
|
|
@ -312,7 +312,6 @@
|
|||
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT
|
||||
#define CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
|
@ -289,7 +289,6 @@
|
|||
#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
|
||||
|
||||
/* Board-specific PCI */
|
||||
#define CFG_PCI_PRE_INIT 1 /* enable board pci_pre_init() */
|
||||
#define CFG_PCI_TARGET_INIT /* let board init pci target */
|
||||
#undef CFG_PCI_MASTER_INIT
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue