mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 14:41:31 +00:00
Merge branch 'master' of git://git.denx.de/u-boot-mips
This commit is contained in:
commit
46b7b2e802
35 changed files with 259 additions and 100 deletions
|
@ -4,6 +4,10 @@ menu "MIPS architecture"
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config SYS_ARCH
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default "mips"
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config SYS_CPU
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default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2
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default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2
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config USE_PRIVATE_LIBGCC
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default y
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@ -12,21 +16,39 @@ choice
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config TARGET_QEMU_MIPS
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bool "Support qemu-mips"
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select SUPPORTS_BIG_ENDIAN
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select SUPPORTS_LITTLE_ENDIAN
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select SUPPORTS_CPU_MIPS32_R1
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select SUPPORTS_CPU_MIPS32_R2
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select SUPPORTS_CPU_MIPS64_R1
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select SUPPORTS_CPU_MIPS64_R2
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config TARGET_MALTA
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bool "Support malta"
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select SUPPORTS_BIG_ENDIAN
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select SUPPORTS_LITTLE_ENDIAN
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select SUPPORTS_CPU_MIPS32_R1
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select SUPPORTS_CPU_MIPS32_R2
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config TARGET_VCT
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bool "Support vct"
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select SUPPORTS_BIG_ENDIAN
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select SUPPORTS_CPU_MIPS32_R1
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select SUPPORTS_CPU_MIPS32_R2
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config TARGET_DBAU1X00
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bool "Support dbau1x00"
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select SUPPORTS_BIG_ENDIAN
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select SUPPORTS_LITTLE_ENDIAN
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select SUPPORTS_CPU_MIPS32_R1
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select SUPPORTS_CPU_MIPS32_R2
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config TARGET_PB1X00
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bool "Support pb1x00"
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select SUPPORTS_LITTLE_ENDIAN
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select SUPPORTS_CPU_MIPS32_R1
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select SUPPORTS_CPU_MIPS32_R2
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config TARGET_QEMU_MIPS64
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bool "Support qemu-mips64"
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endchoice
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@ -36,4 +58,88 @@ source "board/micronas/vct/Kconfig"
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source "board/pb1x00/Kconfig"
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source "board/qemu-mips/Kconfig"
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if MIPS
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choice
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prompt "Endianness selection"
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help
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Some MIPS boards can be configured for either little or big endian
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byte order. These modes require different U-Boot images. In general there
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is one preferred byteorder for a particular system but some systems are
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just as commonly used in the one or the other endianness.
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config SYS_BIG_ENDIAN
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bool "Big endian"
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depends on SUPPORTS_BIG_ENDIAN
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config SYS_LITTLE_ENDIAN
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bool "Little endian"
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depends on SUPPORTS_LITTLE_ENDIAN
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endchoice
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choice
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prompt "CPU selection"
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default CPU_MIPS32_R2
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config CPU_MIPS32_R1
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bool "MIPS32 Release 1"
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depends on SUPPORTS_CPU_MIPS32_R1
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select 32BIT
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help
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Choose this option to build an U-Boot for release 1 or later of the
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MIPS32 architecture.
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config CPU_MIPS32_R2
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bool "MIPS32 Release 2"
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depends on SUPPORTS_CPU_MIPS32_R2
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select 32BIT
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help
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Choose this option to build an U-Boot for release 2 or later of the
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MIPS32 architecture.
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config CPU_MIPS64_R1
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bool "MIPS64 Release 1"
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depends on SUPPORTS_CPU_MIPS64_R1
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select 64BIT
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help
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Choose this option to build a kernel for release 1 or later of the
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MIPS64 architecture.
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config CPU_MIPS64_R2
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bool "MIPS64 Release 2"
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depends on SUPPORTS_CPU_MIPS64_R2
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select 64BIT
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help
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Choose this option to build a kernel for release 2 or later of the
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MIPS64 architecture.
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endchoice
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config SUPPORTS_BIG_ENDIAN
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bool
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config SUPPORTS_LITTLE_ENDIAN
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bool
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config SUPPORTS_CPU_MIPS32_R1
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bool
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config SUPPORTS_CPU_MIPS32_R2
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bool
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config SUPPORTS_CPU_MIPS64_R1
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bool
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config SUPPORTS_CPU_MIPS64_R2
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bool
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config 32BIT
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bool
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||||
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config 64BIT
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bool
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endif
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endmenu
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|
|
|
@ -5,25 +5,41 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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ifeq ($(CROSS_COMPILE),)
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CROSS_COMPILE := mips_4KC-
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endif
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# Handle special prefix in ELDK 4.0 toolchain
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ifneq (,$(findstring 4KCle,$(CROSS_COMPILE)))
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ENDIANNESS := -EL
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ifdef CONFIG_SYS_BIG_ENDIAN
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32bit-emul := elf32btsmip
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64bit-emul := elf64btsmip
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32bit-bfd := elf32-tradbigmips
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64bit-bfd := elf64-tradbigmips
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PLATFORM_CPPFLAGS += -EB
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PLATFORM_LDFLAGS += -EB
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endif
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ifdef CONFIG_SYS_LITTLE_ENDIAN
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ENDIANNESS := -EL
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32bit-emul := elf32ltsmip
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64bit-emul := elf64ltsmip
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32bit-bfd := elf32-tradlittlemips
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64bit-bfd := elf64-tradlittlemips
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PLATFORM_CPPFLAGS += -EL
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PLATFORM_LDFLAGS += -EL
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endif
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ifdef CONFIG_SYS_BIG_ENDIAN
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ENDIANNESS := -EB
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ifdef CONFIG_32BIT
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PLATFORM_CPPFLAGS += -mabi=32
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PLATFORM_LDFLAGS += -m $(32bit-emul)
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OBJCOPYFLAGS += -O $(32bit-bfd)
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endif
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# Default to EB if no endianess is configured
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ENDIANNESS ?= -EB
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ifdef CONFIG_64BIT
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PLATFORM_CPPFLAGS += -mabi=64
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PLATFORM_LDFLAGS += -m$(64bit-emul)
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OBJCOPYFLAGS += -O $(64bit-bfd)
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endif
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cpuflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,-mips32
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cpuflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,-mips32r2
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cpuflags-$(CONFIG_CPU_MIPS64_R1) += -march=mips64 -Wa,-mips64
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cpuflags-$(CONFIG_CPU_MIPS64_R2) += -march=mips64r2 -Wa,-mips64r2
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PLATFORM_CPPFLAGS += $(cpuflags-y)
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PLATFORM_CPPFLAGS += -D__MIPS__
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||||
|
@ -49,10 +65,10 @@ __HAVE_ARCH_GENERIC_BOARD := y
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# On the other hand, we want PIC in the U-Boot code to relocate it from ROM
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# to RAM. $28 is always used as gp.
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#
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PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic $(ENDIANNESS)
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PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic
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PLATFORM_CPPFLAGS += -msoft-float
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PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib $(ENDIANNESS)
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PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib
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PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
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LDFLAGS_FINAL += --gc-sections -pie
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||||
OBJCOPYFLAGS += -j .text -j .rodata -j .data -j .got
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||||
OBJCOPYFLAGS += -j .u_boot_list -j .rel.dyn
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OBJCOPYFLAGS += -j .u_boot_list -j .rel.dyn -j .padding
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||||
|
|
|
@ -5,19 +5,5 @@
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|||
# SPDX-License-Identifier: GPL-2.0+
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#
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||||
|
||||
#
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||||
# Default optimization level for MIPS32
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#
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||||
# Note: Toolchains with binutils prior to v2.16
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# are no longer supported by U-Boot MIPS tree!
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#
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PLATFORM_CPPFLAGS += -DCONFIG_MIPS32 -march=mips32r2
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PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
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ifdef CONFIG_SYS_BIG_ENDIAN
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PLATFORM_LDFLAGS += -m elf32btsmip
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else
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PLATFORM_LDFLAGS += -m elf32ltsmip
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endif
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CONFIG_STANDALONE_LOAD_ADDR ?= 0x80200000 \
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-T $(srctree)/examples/standalone/mips.lds
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|
|
|
@ -5,19 +5,5 @@
|
|||
# SPDX-License-Identifier: GPL-2.0+
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#
|
||||
|
||||
#
|
||||
# Default optimization level for MIPS64
|
||||
#
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||||
# Note: Toolchains with binutils prior to v2.16
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# are no longer supported by U-Boot MIPS tree!
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#
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PLATFORM_CPPFLAGS += -DCONFIG_MIPS64 -march=mips64
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PLATFORM_CPPFLAGS += -mabi=64 -DCONFIG_64BIT
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ifdef CONFIG_SYS_BIG_ENDIAN
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PLATFORM_LDFLAGS += -m elf64btsmip
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else
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PLATFORM_LDFLAGS += -m elf64ltsmip
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endif
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CONFIG_STANDALONE_LOAD_ADDR ?= 0xffffffff80200000 \
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-T $(srctree)/examples/standalone/mips64.lds
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|
|
|
@ -61,6 +61,24 @@ SECTIONS
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__rel_dyn_end = .;
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}
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.padding : {
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/*
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* Workaround for a binutils feature (or bug?).
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*
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* The GNU ld from binutils puts the dynamic relocation
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||||
* entries into the .rel.dyn section. Sometimes it
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* allocates more dynamic relocation entries than it needs
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* and the unused slots are set to R_MIPS_NONE entries.
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*
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* However the size of the .rel.dyn section in the ELF
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* section header does not cover the unused entries, so
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* objcopy removes those during stripping.
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||||
*
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* Create a small section here to avoid that.
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||||
*/
|
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LONG(0xFFFFFFFF)
|
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}
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|
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_end = .;
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|
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.bss __rel_dyn_start (OVERLAY) : {
|
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|
|
|
@ -1,8 +1,5 @@
|
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if TARGET_DBAU1X00
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|
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config SYS_CPU
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default "mips32"
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|
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config SYS_BOARD
|
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default "dbau1x00"
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|
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|
@ -12,4 +9,22 @@ config SYS_SOC
|
|||
config SYS_CONFIG_NAME
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default "dbau1x00"
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|
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menu "dbau1x00 board options"
|
||||
|
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choice
|
||||
prompt "Select au1x00 SoC type"
|
||||
|
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config DBAU1100
|
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bool "Select AU1100"
|
||||
|
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config DBAU1500
|
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bool "Select AU1500"
|
||||
|
||||
config DBAU1550
|
||||
bool "Select AU1550"
|
||||
|
||||
endchoice
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
@ -1,8 +1,5 @@
|
|||
if TARGET_MALTA
|
||||
|
||||
config SYS_CPU
|
||||
default "mips32"
|
||||
|
||||
config SYS_BOARD
|
||||
default "malta"
|
||||
|
||||
|
|
|
@ -1,8 +1,5 @@
|
|||
if TARGET_VCT
|
||||
|
||||
config SYS_CPU
|
||||
default "mips32"
|
||||
|
||||
config SYS_BOARD
|
||||
default "vct"
|
||||
|
||||
|
@ -12,4 +9,28 @@ config SYS_VENDOR
|
|||
config SYS_CONFIG_NAME
|
||||
default "vct"
|
||||
|
||||
menu "vct board options"
|
||||
|
||||
choice
|
||||
prompt "Board variant"
|
||||
|
||||
config VCT_PLATINUM
|
||||
bool "Enable VCT_PLATINUM"
|
||||
|
||||
config VCT_PLATINUMAVC
|
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bool "Enable VCT_PLATINUMAVC"
|
||||
|
||||
config VCT_PREMIUM
|
||||
bool "Enable VCT_PLATINUMAVC"
|
||||
|
||||
endchoice
|
||||
|
||||
config VCT_ONENAND
|
||||
bool "Enable VCT_ONENAND"
|
||||
|
||||
config VCT_SMALL_IMAGE
|
||||
bool "Enable VCT_SMALL_IMAGE"
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
@ -1,8 +1,5 @@
|
|||
if TARGET_PB1X00
|
||||
|
||||
config SYS_CPU
|
||||
default "mips32"
|
||||
|
||||
config SYS_BOARD
|
||||
default "pb1x00"
|
||||
|
||||
|
|
|
@ -1,25 +1,10 @@
|
|||
if TARGET_QEMU_MIPS
|
||||
|
||||
config SYS_CPU
|
||||
default "mips32"
|
||||
|
||||
config SYS_BOARD
|
||||
default "qemu-mips"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "qemu-mips"
|
||||
|
||||
endif
|
||||
|
||||
if TARGET_QEMU_MIPS64
|
||||
|
||||
config SYS_CPU
|
||||
default "mips64"
|
||||
|
||||
config SYS_BOARD
|
||||
default "qemu-mips"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "qemu-mips64"
|
||||
default "qemu-mips" if 32BIT
|
||||
default "qemu-mips64" if 64BIT
|
||||
|
||||
endif
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="DBAU1000"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_DBAU1X00=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="DBAU1100"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_DBAU1X00=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_DBAU1100=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="DBAU1500"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_DBAU1X00=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_DBAU1500=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="DBAU1550"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_DBAU1X00=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_DBAU1550=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="DBAU1550,SYS_LITTLE_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_DBAU1X00=y
|
||||
CONFIG_SYS_LITTLE_ENDIAN=y
|
||||
CONFIG_DBAU1550=y
|
||||
|
|
|
@ -1,3 +1,3 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BIG_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_MALTA=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
|
|
|
@ -1,3 +1,3 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SYS_LITTLE_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_MALTA=y
|
||||
CONFIG_SYS_LITTLE_ENDIAN=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="PB1000"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_PB1X00=y
|
||||
CONFIG_SYS_LITTLE_ENDIAN=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BIG_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_QEMU_MIPS64=y
|
||||
CONFIG_TARGET_QEMU_MIPS=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_CPU_MIPS64_R1=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SYS_LITTLE_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_QEMU_MIPS64=y
|
||||
CONFIG_TARGET_QEMU_MIPS=y
|
||||
CONFIG_SYS_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_MIPS64_R1=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SYS_BIG_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_QEMU_MIPS=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_CPU_MIPS32_R2=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="SYS_LITTLE_ENDIAN"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_QEMU_MIPS=y
|
||||
CONFIG_SYS_LITTLE_ENDIAN=y
|
||||
CONFIG_CPU_MIPS32_R2=y
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUM"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUM=y
|
||||
|
|
|
@ -1,3 +1,5 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUM,VCT_ONENAND"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUM=y
|
||||
CONFIG_VCT_ONENAND=y
|
||||
|
|
|
@ -1,4 +1,7 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUM=y
|
||||
CONFIG_VCT_ONENAND=y
|
||||
CONFIG_VCT_SMALL_IMAGE=y
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
|
|
|
@ -1,4 +1,6 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUM,VCT_SMALL_IMAGE"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUM=y
|
||||
CONFIG_VCT_SMALL_IMAGE=y
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUMAVC"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUMAVC=y
|
||||
|
|
|
@ -1,3 +1,5 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUMAVC,VCT_ONENAND"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUMAVC=y
|
||||
CONFIG_VCT_ONENAND=y
|
||||
|
|
|
@ -1,4 +1,7 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUMAVC=y
|
||||
CONFIG_VCT_ONENAND=y
|
||||
CONFIG_VCT_SMALL_IMAGE=y
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
|
|
|
@ -1,4 +1,6 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUMAVC,VCT_SMALL_IMAGE"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PLATINUMAVC=y
|
||||
CONFIG_VCT_SMALL_IMAGE=y
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
|
|
|
@ -1,3 +1,4 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PREMIUM"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PREMIUM=y
|
||||
|
|
|
@ -1,3 +1,5 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PREMIUM,VCT_ONENAND"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PREMIUM=y
|
||||
CONFIG_VCT_ONENAND=y
|
||||
|
|
|
@ -1,4 +1,7 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PREMIUM=y
|
||||
CONFIG_VCT_ONENAND=y
|
||||
CONFIG_VCT_SMALL_IMAGE=y
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
|
|
|
@ -1,4 +1,6 @@
|
|||
CONFIG_SYS_EXTRA_OPTIONS="VCT_PREMIUM,VCT_SMALL_IMAGE"
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_TARGET_VCT=y
|
||||
CONFIG_SYS_BIG_ENDIAN=y
|
||||
CONFIG_VCT_PREMIUM=y
|
||||
CONFIG_VCT_SMALL_IMAGE=y
|
||||
# CONFIG_CMD_CRC32 is not set
|
||||
|
|
|
@ -29,8 +29,6 @@
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_LITTLE_ENDIAN
|
||||
|
||||
#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
|
||||
|
||||
#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
|
||||
|
|
Loading…
Add table
Reference in a new issue