GitHub-Mirror/u-boot
2
0
Fork 0
mirror of https://github.com/Fishwaldo/u-boot.git synced 2025-03-15 19:51:37 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

x86: tangier: Fix DMA controller IRQ polarity in CSRT

Browse source 
IRQ polarity in CSRT has the same definition as by ACPI specification
chapter 19.6.64 "Interrupt (Interrupt Resource Descriptor Macro)", i.e.
ActiveHigh is 0, and ActiveLow is 1. On Intel Tangier the DMA controller
IRQ polarity is ActiveHigh.

Note, in DSDT (see southcluster.asl) it's described correctly.

Fixes: 5e99fde34a ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Andy Shevchenko 2021-07-30 23:15:44 +03:00 • committed by Bin Meng
parent bd798eed55
commit 46db4bbac3
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
arch/x86/cpu/tangier/acpi.c
View file

@ -89,8 +89,8 @@ static u32 acpi_fill_csrt_dma(struct acpi_csrt_group *grp)
si->mmio_base_low = 0xff192000;
si->mmio_base_high = 0;
si->gsi_interrupt = 32;
si->interrupt_polarity = 1;
si->interrupt_mode = 0;
si->interrupt_polarity = 0; /* Active High */
si->interrupt_mode = 0; /* Level triggered */
si->num_channels = 8;
si->dma_address_width = 32;
si->base_request_line = 0;