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gpio: Add MT7621 GPIO support
This patch adds GPIO support for the Mediatek MT7621 SoC, tested on MT7688 (Gardena smart-gateway). The driver is loosly based on the Linux kernel version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> [fixed checkpatch.pl warnings: Prefer 'unsigned int' to bare use of 'unsigned'] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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3 changed files with 192 additions and 0 deletions
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@ -314,4 +314,12 @@ config MPC8XXX_GPIO
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Aside from the standard functions of input/output mode, and output
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value setting, the open-drain feature, which can configure individual
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GPIOs to work as open-drain outputs, is supported.
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config MT7621_GPIO
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bool "MediaTek MT7621 GPIO driver"
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depends on DM_GPIO && ARCH_MT7620
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default y
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help
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Say yes here to support MediaTek MT7621 compatible GPIOs.
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endmenu
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@ -58,3 +58,4 @@ obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
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obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
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obj-$(CONFIG_$(SPL_)PCF8575_GPIO) += pcf8575_gpio.o
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obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
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obj-$(CONFIG_MT7621_GPIO) += mt7621_gpio.o
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183
drivers/gpio/mt7621_gpio.c
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183
drivers/gpio/mt7621_gpio.c
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@ -0,0 +1,183 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Stefan Roese <sr@denx.de>
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*
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* Based on the Linux driver version which is:
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* Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <linux/io.h>
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#include <asm/io.h>
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#include <asm/gpio.h>
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#include <dm/device-internal.h>
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#include <dt-bindings/gpio/gpio.h>
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#define MTK_MAX_BANK 3
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#define MTK_BANK_WIDTH 32
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enum mediatek_gpio_reg {
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GPIO_REG_CTRL = 0,
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GPIO_REG_POL,
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GPIO_REG_DATA,
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GPIO_REG_DSET,
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GPIO_REG_DCLR,
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GPIO_REG_REDGE,
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GPIO_REG_FEDGE,
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GPIO_REG_HLVL,
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GPIO_REG_LLVL,
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GPIO_REG_STAT,
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GPIO_REG_EDGE,
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};
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static void __iomem *mediatek_gpio_membase;
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struct mediatek_gpio_platdata {
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char bank_name[3]; /* Name of bank, e.g. "PA", "PB" etc */
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int gpio_count;
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int bank;
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};
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static u32 reg_offs(struct mediatek_gpio_platdata *plat, int reg)
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{
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return (reg * 0x10) + (plat->bank * 0x4);
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}
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static int mediatek_gpio_get_value(struct udevice *dev, unsigned int offset)
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{
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struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
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return !!(ioread32(mediatek_gpio_membase +
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reg_offs(plat, GPIO_REG_DATA)) & BIT(offset));
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}
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static int mediatek_gpio_set_value(struct udevice *dev, unsigned int offset,
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int value)
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{
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struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
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iowrite32(BIT(offset), mediatek_gpio_membase +
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reg_offs(plat, value ? GPIO_REG_DSET : GPIO_REG_DCLR));
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return 0;
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}
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static int mediatek_gpio_direction_input(struct udevice *dev, unsigned int offset)
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{
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struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
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clrbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL),
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BIT(offset));
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return 0;
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}
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static int mediatek_gpio_direction_output(struct udevice *dev, unsigned int offset,
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int value)
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{
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struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
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setbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL),
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BIT(offset));
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mediatek_gpio_set_value(dev, offset, value);
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return 0;
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}
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static int mediatek_gpio_get_function(struct udevice *dev, unsigned int offset)
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{
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struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
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u32 t;
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t = ioread32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL));
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if (t & BIT(offset))
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return GPIOF_OUTPUT;
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return GPIOF_INPUT;
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}
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static const struct dm_gpio_ops gpio_mediatek_ops = {
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.direction_input = mediatek_gpio_direction_input,
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.direction_output = mediatek_gpio_direction_output,
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.get_value = mediatek_gpio_get_value,
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.set_value = mediatek_gpio_set_value,
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.get_function = mediatek_gpio_get_function,
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};
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static int gpio_mediatek_probe(struct udevice *dev)
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{
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struct mediatek_gpio_platdata *plat = dev_get_platdata(dev);
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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/* Tell the uclass how many GPIOs we have */
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if (plat) {
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uc_priv->gpio_count = plat->gpio_count;
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uc_priv->bank_name = plat->bank_name;
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}
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return 0;
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}
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/**
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* We have a top-level GPIO device with no actual GPIOs. It has a child
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* device for each Mediatek bank.
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*/
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static int gpio_mediatek_bind(struct udevice *parent)
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{
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struct mediatek_gpio_platdata *plat = parent->platdata;
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ofnode node;
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int bank = 0;
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int ret;
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/* If this is a child device, there is nothing to do here */
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if (plat)
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return 0;
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mediatek_gpio_membase = dev_remap_addr(parent);
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if (!mediatek_gpio_membase)
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return -EINVAL;
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for (node = dev_read_first_subnode(parent); ofnode_valid(node);
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node = dev_read_next_subnode(node)) {
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struct mediatek_gpio_platdata *plat;
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struct udevice *dev;
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plat = calloc(1, sizeof(*plat));
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if (!plat)
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return -ENOMEM;
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plat->bank_name[0] = 'P';
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plat->bank_name[1] = 'A' + bank;
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plat->bank_name[2] = '\0';
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plat->gpio_count = MTK_BANK_WIDTH;
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plat->bank = bank;
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ret = device_bind(parent, parent->driver,
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plat->bank_name, plat, -1, &dev);
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if (ret)
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return ret;
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dev->node = node;
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bank++;
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}
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return 0;
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}
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static const struct udevice_id mediatek_gpio_ids[] = {
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{ .compatible = "mtk,mt7621-gpio" },
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{ }
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};
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U_BOOT_DRIVER(gpio_mediatek) = {
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.name = "gpio_mediatek",
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.id = UCLASS_GPIO,
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.ops = &gpio_mediatek_ops,
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.of_match = mediatek_gpio_ids,
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.bind = gpio_mediatek_bind,
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.probe = gpio_mediatek_probe,
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};
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