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rockchip: rk3288: Add support for drive-strength in PINCTRL
Currently, drive-strenght to 12ma are described and supposed to be used on RK3288. However, the pinctrl driver for this SoC only handles muxing and pull up/pull down via PU/PD control registers. So complex IPs like GMAC are working in normal ethernet 100mbps, but not at 1gbps typically. This commit adds support for handling drive-strength of 12ma, when it's defined in the DT. Signed-off-by: Romain Perier <romain.perier@collabora.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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parent
42ec247e69
commit
478e6f2e94
1 changed files with 9 additions and 1 deletions
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@ -729,7 +729,7 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
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value |= (mask << (shift + 16)) | (muxval << shift);
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writel(value, addr);
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/* Handle pullup/pulldown */
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/* Handle pullup/pulldown/drive-strength */
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if (flags) {
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uint val = 0;
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@ -737,10 +737,15 @@ static int rk3288_pinctrl_set_pins(struct udevice *dev, int banknum, int index,
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val = 1;
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else if (flags & (1 << PIN_CONFIG_BIAS_PULL_DOWN))
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val = 2;
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else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
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val = 3;
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shift = (index & 7) * 2;
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ind = index >> 3;
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if (banknum == 0)
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addr = &priv->pmu->gpio0pull[ind];
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else if (flags & (1 << PIN_CONFIG_DRIVE_STRENGTH))
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addr = &priv->grf->gpio1_e[banknum - 1][ind];
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else
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addr = &priv->grf->gpio1_p[banknum - 1][ind];
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debug("%s: addr=%p, val=%x, shift=%x\n", __func__, addr, val,
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@ -779,6 +784,9 @@ static int rk3288_pinctrl_set_state(struct udevice *dev, struct udevice *config)
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if (flags < 0)
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return flags;
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if (fdtdec_get_int(blob, pcfg_node, "drive-strength", 0) == 12)
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flags |= 1 << PIN_CONFIG_DRIVE_STRENGTH;
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ret = rk3288_pinctrl_set_pins(dev, ptr[0], ptr[1], ptr[2],
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flags);
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if (ret)
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