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arm: spear: fix enabling of SSP2 clock

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The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike
the current 0x70 which enables the clock of UART2, SSP1 and SSP2.

Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Quentin Schulz 2018-08-31 16:28:31 +02:00 • committed by Tom Rini
parent ac47fbee6d
commit 484a878273
1 changed files with 1 additions and 1 deletions
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2
arch/arm/include/asm/arch-spear/spr_misc.h
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@ -151,7 +151,7 @@ struct misc_regs {
#define MISC_GPT2ENB 0x00000800
#define MISC_FSMCENB 0x00000200
#define MISC_I2CENB 0x00000080
#define MISC_SSP2ENB 0x00000070
#define MISC_SSP2ENB 0x00000040
#define MISC_SSP1ENB 0x00000020
#define MISC_UART0ENB 0x00000008