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fsl_esdhc: Add function to reset the eSDHC controller
To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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2 changed files with 18 additions and 0 deletions
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@ -344,6 +344,20 @@ static int esdhc_init(struct mmc *mmc)
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return ret;
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}
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static void esdhc_reset(struct fsl_esdhc *regs)
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{
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unsigned long timeout = 100; /* wait max 100 ms */
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/* reset the controller */
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esdhc_write32(®s->sysctl, SYSCTL_RSTA);
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/* hardware clears the bit when it is done */
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while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTA) && --timeout)
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udelay(1000);
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if (!timeout)
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printf("MMC/SD: Reset never completed.\n");
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}
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int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
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{
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struct fsl_esdhc *regs;
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@ -358,6 +372,9 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
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sprintf(mmc->name, "FSL_ESDHC");
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regs = (struct fsl_esdhc *)cfg->esdhc_base;
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/* First reset the eSDHC controller */
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esdhc_reset(regs);
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mmc->priv = cfg;
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mmc->send_cmd = esdhc_send_cmd;
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mmc->set_ios = esdhc_set_ios;
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@ -39,6 +39,7 @@
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#define SYSCTL_PEREN 0x00000004
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#define SYSCTL_HCKEN 0x00000002
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#define SYSCTL_IPGEN 0x00000001
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#define SYSCTL_RSTA 0x01000000
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#define IRQSTAT 0x0002e030
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#define IRQSTAT_DMAE (0x10000000)
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