mirror of
https://github.com/Fishwaldo/u-boot.git
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Merge git://git.denx.de/u-boot-x86
- Edison switch to CONFIG_OF_SEPARATE. - Tangier initial ACPI support for PMIC device. - TSC timer driver update to support native calibration. - Fixes to 64-bit U-Boot proper.
This commit is contained in:
Tom Rini
commit
49a97162ea
6 changed files with 161 additions and 25 deletions
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@ -79,6 +79,10 @@ lret_target:
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mov %eax, %eax /* Clear bits 63:32 */
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jmp *%eax /* Jump to the 64-bit target */
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.globl call64_stub_size
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call64_stub_size:
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.long . - cpu_call64
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.data
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.align 16
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.globl gdt64
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@ -462,6 +462,7 @@ int cpu_has_64bit(void)
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has_long_mode();
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}
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#define PAGETABLE_BASE 0x80000
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#define PAGETABLE_SIZE (6 * 4096)
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/**
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@ -522,33 +523,21 @@ int cpu_jump_to_64bit_uboot(ulong target)
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typedef void (*func_t)(ulong pgtable, ulong setup_base, ulong target);
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uint32_t *pgtable;
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func_t func;
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char *ptr;
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/* TODO(sjg@chromium.org): Find a better place for this */
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pgtable = (uint32_t *)0x1000000;
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if (!pgtable)
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return -ENOMEM;
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pgtable = (uint32_t *)PAGETABLE_BASE;
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build_pagetable(pgtable);
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/* TODO(sjg@chromium.org): Find a better place for this */
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char *ptr = (char *)0x3000000;
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char *gdt = (char *)0x3100000;
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extern long call64_stub_size;
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ptr = malloc(call64_stub_size);
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if (!ptr) {
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printf("Failed to allocate the cpu_call64 stub\n");
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return -ENOMEM;
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}
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memcpy(ptr, cpu_call64, call64_stub_size);
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extern char gdt64[];
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memcpy(ptr, cpu_call64, 0x1000);
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memcpy(gdt, gdt64, 0x100);
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/*
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* TODO(sjg@chromium.org): This manually inserts the pointers into
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* the code. Tidy this up to avoid this.
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*/
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func = (func_t)ptr;
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ulong ofs = (ulong)cpu_call64 - (ulong)ptr;
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*(ulong *)(ptr + 7) = (ulong)gdt;
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*(ulong *)(ptr + 0xc) = (ulong)gdt + 2;
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*(ulong *)(ptr + 0x13) = (ulong)gdt;
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*(ulong *)(ptr + 0x117 - 0xd4) -= ofs;
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/*
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* Copy U-Boot from ROM
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@ -320,6 +320,93 @@ Device (PCI0)
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})
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}
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}
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Device (IPC1)
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{
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Name (_ADR, 0x00130000)
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Device (PMIC)
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{
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Name (_ADR, Zero)
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Name (_HID, "INTC100E")
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Name (_CID, "INTC100E")
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Name (_DDN, "Basin Cove PMIC")
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Name (_DEP, Package ()
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{
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IPC1
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})
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Method (_STA, 0, NotSerialized)
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{
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Return (STA_VISIBLE)
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}
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Method (_CRS, 0, Serialized)
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{
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Name (RBUF, ResourceTemplate()
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{
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/*
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* Shadow registers in SRAM for PMIC:
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* SRAM PMIC register
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* --------------------
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* 0x00- Unknown
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* 0x03 THRMIRQ (0x04)
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* 0x04 BCUIRQ (0x05)
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* 0x05 ADCIRQ (0x06)
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* 0x06 CHGRIRQ0 (0x07)
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* 0x07 CHGRIRQ1 (0x08)
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* 0x08- Unknown
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* 0x0a PBSTATUS (0x27)
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* 0x0b- Unknown
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*/
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Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010)
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 }
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Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 }
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})
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Return (RBUF)
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}
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OperationRegion (PMOP, 0x8D, Zero, 0x0100)
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Field (PMOP, DWordAcc, NoLock, Preserve)
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{
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SEL1, 32,
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SEL2, 32,
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VCCL, 32,
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VNNL, 32,
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AONL, 32,
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CNTC, 32,
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CNTN, 32,
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AONN, 32,
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CNT1, 32,
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CNT2, 32,
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CNT3, 32,
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FLEX, 32,
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PRG1, 32,
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PRG2, 32,
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PRG3, 32,
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VLDO, 32,
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}
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Name (AVBL, Zero)
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Method (_REG, 2, NotSerialized)
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{
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If ((Arg0 == 0x8D))
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{
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AVBL = Arg1
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}
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}
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}
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}
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}
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Device (FLIS)
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@ -25,7 +25,7 @@ CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_CMD_FS_GENERIC=y
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CONFIG_OF_EMBED=y
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CONFIG_OF_SEPARATE=y
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CONFIG_DEFAULT_DEVICE_TREE="edison"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_CPU=y
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@ -122,13 +122,14 @@ the U-Boot image (including u-boot.bin). This is suitable for debugging
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and development only and is not recommended for production devices.
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If CONFIG_OF_SEPARATE is defined, then it will be built and placed in
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a u-boot.dtb file alongside u-boot.bin. A common approach is then to
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a u-boot.dtb file alongside u-boot-nodtb.bin. A common approach is then to
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join the two:
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cat u-boot.bin u-boot.dtb >image.bin
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cat u-boot-nodtb.bin u-boot.dtb >image.bin
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and then flash image.bin onto your board. Note that U-Boot creates
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u-boot-dtb.bin which does the above step for you also. If you are using
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u-boot-dtb.bin which does the above step for you also. Resulting
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u-boot.bin is a copy of u-boot-dtb.bin in this case. If you are using
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CONFIG_SPL_FRAMEWORK, then u-boot.img will be built to include the device
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tree binary.
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@ -19,8 +19,59 @@
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#define MAX_NUM_FREQS 9
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#define INTEL_FAM6_SKYLAKE_MOBILE 0x4E
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#define INTEL_FAM6_ATOM_GOLDMONT 0x5C /* Apollo Lake */
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#define INTEL_FAM6_SKYLAKE_DESKTOP 0x5E
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#define INTEL_FAM6_ATOM_GOLDMONT_X 0x5F /* Denverton */
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#define INTEL_FAM6_KABYLAKE_MOBILE 0x8E
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#define INTEL_FAM6_KABYLAKE_DESKTOP 0x9E
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* native_calibrate_tsc
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* Determine TSC frequency via CPUID, else return 0.
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*/
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static unsigned long native_calibrate_tsc(void)
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{
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struct cpuid_result tsc_info;
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unsigned int crystal_freq;
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if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
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return 0;
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if (cpuid_eax(0) < 0x15)
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return 0;
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tsc_info = cpuid(0x15);
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if (tsc_info.ebx == 0 || tsc_info.eax == 0)
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return 0;
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crystal_freq = tsc_info.ecx / 1000;
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if (!crystal_freq) {
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switch (gd->arch.x86_model) {
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case INTEL_FAM6_SKYLAKE_MOBILE:
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case INTEL_FAM6_SKYLAKE_DESKTOP:
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case INTEL_FAM6_KABYLAKE_MOBILE:
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case INTEL_FAM6_KABYLAKE_DESKTOP:
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crystal_freq = 24000; /* 24.0 MHz */
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break;
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case INTEL_FAM6_ATOM_GOLDMONT_X:
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crystal_freq = 25000; /* 25.0 MHz */
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break;
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case INTEL_FAM6_ATOM_GOLDMONT:
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crystal_freq = 19200; /* 19.2 MHz */
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break;
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default:
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return 0;
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}
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}
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return (crystal_freq * tsc_info.ebx / tsc_info.eax) / 1000;
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}
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static unsigned long cpu_mhz_from_cpuid(void)
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{
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if (gd->arch.x86_vendor != X86_VENDOR_INTEL)
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@ -350,6 +401,10 @@ static void tsc_timer_ensure_setup(bool early)
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if (!gd->arch.clock_rate) {
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unsigned long fast_calibrate;
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fast_calibrate = native_calibrate_tsc();
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if (fast_calibrate)
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goto done;
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fast_calibrate = cpu_mhz_from_cpuid();
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if (fast_calibrate)
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goto done;
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