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dm: Convert PCI MMC over to use DM PCI API
At present pci_mmc_init() does not correctly use the PCI function since the list it passes is not terminated. The array size passed to pci_mmc_init() is actually not used correctly. Fix this and adjust the pci_mmc_init() to scan all available MMC devices. Adjust this code to use the new driver model PCI API. This should move over to the new MMC uclass at some point. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
parent
09c5c16455
commit
4abe8e40a7
5 changed files with 15 additions and 18 deletions
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@ -14,12 +14,12 @@
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static struct pci_device_id mmc_supported[] = {
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDIO },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SDCARD },
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{},
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};
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};
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int cpu_mmc_init(bd_t *bis)
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int cpu_mmc_init(bd_t *bis)
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{
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{
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return pci_mmc_init("ValleyView SDHCI", mmc_supported,
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return pci_mmc_init("ValleyView SDHCI", mmc_supported);
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ARRAY_SIZE(mmc_supported));
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}
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}
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#ifndef CONFIG_EFI_APP
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#ifndef CONFIG_EFI_APP
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@ -19,6 +19,7 @@
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static struct pci_device_id mmc_supported[] = {
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
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{},
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};
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};
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/*
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/*
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@ -337,8 +338,7 @@ int arch_early_init_r(void)
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int cpu_mmc_init(bd_t *bis)
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int cpu_mmc_init(bd_t *bis)
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{
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{
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return pci_mmc_init("Quark SDHCI", mmc_supported,
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return pci_mmc_init("Quark SDHCI", mmc_supported);
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ARRAY_SIZE(mmc_supported));
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}
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}
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void cpu_irq_init(void)
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void cpu_irq_init(void)
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@ -11,10 +11,10 @@
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static struct pci_device_id mmc_supported[] = {
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static struct pci_device_id mmc_supported[] = {
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
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{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
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{},
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};
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};
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int cpu_mmc_init(bd_t *bis)
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int cpu_mmc_init(bd_t *bis)
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{
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{
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return pci_mmc_init("Topcliff SDHCI", mmc_supported,
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return pci_mmc_init("Topcliff SDHCI", mmc_supported);
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ARRAY_SIZE(mmc_supported));
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}
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}
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@ -11,26 +11,25 @@
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#include <sdhci.h>
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#include <sdhci.h>
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#include <asm/pci.h>
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#include <asm/pci.h>
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int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported,
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int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported)
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int num_ids)
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{
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{
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struct sdhci_host *mmc_host;
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struct sdhci_host *mmc_host;
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pci_dev_t devbusfn;
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u32 iobase;
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u32 iobase;
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int ret;
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int ret;
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int i;
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int i;
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for (i = 0; i < num_ids; i++) {
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for (i = 0; ; i++) {
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devbusfn = pci_find_devices(mmc_supported, i);
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struct udevice *dev;
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if (devbusfn == -1)
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return -ENODEV;
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ret = pci_find_device_id(mmc_supported, i, &dev);
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if (ret)
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return ret;
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mmc_host = malloc(sizeof(struct sdhci_host));
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mmc_host = malloc(sizeof(struct sdhci_host));
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if (!mmc_host)
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if (!mmc_host)
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return -ENOMEM;
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return -ENOMEM;
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mmc_host->name = (char *)name;
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mmc_host->name = (char *)name;
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pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
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dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0, &iobase);
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mmc_host->ioaddr = (void *)iobase;
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mmc_host->ioaddr = (void *)iobase;
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mmc_host->quirks = 0;
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mmc_host->quirks = 0;
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ret = add_sdhci(mmc_host, 0, 0);
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ret = add_sdhci(mmc_host, 0, 0);
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@ -489,11 +489,9 @@ struct pci_device_id;
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* This finds all the matching PCI IDs and sets them up as MMC devices.
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* This finds all the matching PCI IDs and sets them up as MMC devices.
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*
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*
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* @name: Name to use for devices
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* @name: Name to use for devices
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* @mmc_supported: PCI IDs to search for
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* @mmc_supported: PCI IDs to search for, terminated by {0, 0}
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* @num_ids: Number of elements in @mmc_supported
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*/
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*/
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int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported,
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int pci_mmc_init(const char *name, struct pci_device_id *mmc_supported);
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int num_ids);
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/* Set block count limit because of 16 bit register limit on some hardware*/
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/* Set block count limit because of 16 bit register limit on some hardware*/
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#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
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#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
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