mirror of
https://github.com/Fishwaldo/u-boot.git
synced 2025-03-21 06:31:31 +00:00
rockchip: board: lion-rk3368: add support for the RK3368-uQ7
The RK3368-uQ7 (codenamed 'Lion') is a micro-Qseven (40mm x 70mm, MXM-230 edge connector compatible with the Qseven specification) form-factor system-on-module based on the octo-core Rockchip RK3368. It is designed, supported and manufactured by Theobroma Systems. It provides the following features: - 8x Cortex-A53 (in 2 clusters of 4 cores each) - (on-module) up to 4GB of DDR3 memory - (on-module) SPI-NOR flash - (on-module) eMMC - Gigabit Ethernet (with an on-module KSZ9031 PHY) - USB - HDMI - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Philipp Tomsich
parent
d16120a6de
commit
4d02d20605
13 changed files with 583 additions and 4 deletions
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@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-veyron-mickey.dtb \
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rk3288-veyron-minnie.dtb \
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rk3328-evb.dtb \
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rk3368-lion.dtb \
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rk3368-sheep.dtb \
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rk3368-geekbox.dtb \
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rk3368-px5-evb.dtb \
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88
arch/arm/dts/rk3368-lion-u-boot.dtsi
Normal file
88
arch/arm/dts/rk3368-lion-u-boot.dtsi
Normal file
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@ -0,0 +1,88 @@
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/ {
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config {
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u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
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u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
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};
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chosen {
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stdout-path = "serial0:115200n8";
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u-boot,spl-boot-order = &emmc, &sdmmc;
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};
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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};
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&service_msch {
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u-boot,dm-pre-reloc;
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};
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&dmc {
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u-boot,dm-pre-reloc;
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/*
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* Validation of throughput using SPEC2000 shows the following
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* relative performance for the different memory schedules:
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* - CBDR: 30.1
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* - CBRD: 29.8
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* - CRBD: 29.9
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* Note that the best performance for any given application workload
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* may vary from the default configured here (e.g. 164.gzip is fastest
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* with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD).
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*
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* See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
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* details on the 'rockchip,memory-schedule' property and how it
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* affects the physical-address to device-address mapping.
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*/
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rockchip,memory-schedule = <DMC_MSCH_CBDR>;
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rockchip,ddr-frequency = <800000000>;
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rockchip,ddr-speed-bin = <DDR3_1600K>;
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status = "okay";
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};
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&pmugrf {
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u-boot,dm-pre-reloc;
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};
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&sgrf {
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u-boot,dm-pre-reloc;
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};
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&cru {
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u-boot,dm-pre-reloc;
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};
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&grf {
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u-boot,dm-pre-reloc;
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};
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&uart0 {
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u-boot,dm-pre-reloc;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&spi1 {
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u-boot,dm-pre-reloc;
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spiflash: w25q32dw@0 {
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u-boot,dm-pre-reloc;
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};
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};
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195
arch/arm/dts/rk3368-lion.dts
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195
arch/arm/dts/rk3368-lion.dts
Normal file
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@ -0,0 +1,195 @@
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/*
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* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "rk3368.dtsi"
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#include "rk3368-lion-u-boot.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "Theobroma Systems RK3368-uQ7 SoM";
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compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368";
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x0 0x0 0x80000000>;
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};
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ext_gmac: gmac-clk {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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#clock-cells = <0>;
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};
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vcc_sys: vcc-sys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&uart0 {
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status = "okay";
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};
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&emmc {
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status = "okay";
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bus-width = <8>;
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cap-mmc-highspeed;
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clock-frequency = <150000000>;
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disable-wp;
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keep-power-in-suspend;
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non-removable;
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num-slots = <1>;
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vmmc-supply = <&vcc33_io>;
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vqmmc-supply = <&vcc18_io>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
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};
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&sdmmc {
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status = "okay";
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};
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&gmac {
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status = "okay";
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phy-supply = <&vcc33_io>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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snps,reset-delays-us = <2 10000 50000>;
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x10>;
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rx_delay = <0x10>;
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};
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&i2c0 {
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status = "okay";
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio0>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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rockchip,system-power-controller;
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc6-supply = <&vcc_sys>;
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vcc7-supply = <&vcc_sys>;
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vcc8-supply = <&vcc_sys>;
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vcc9-supply = <&vcc_sys>;
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vcc10-supply = <&vcc_sys>;
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vcc11-supply = <&vcc_sys>;
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vcc12-supply = <&vcc_sys>;
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clock-output-names = "xin32k", "rk808-clkout2";
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#clock-cells = <1>;
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regulators {
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vdd_cpu: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd_cpu";
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};
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vdd_log: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1500000>;
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regulator-name = "vdd_log";
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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};
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vcc33_io: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_io";
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};
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vcc33_video: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_video";
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};
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vdd10_pll: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_pll";
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};
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vcc18_io: LDO_REG4 {
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_io";
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};
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vdd10_video: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_video";
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};
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vcc18_video: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_video";
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};
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&spi1 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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spiflash: w25q32dw@0 {
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compatible = "spi-flash";
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reg = <0>;
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spi-max-frequency = <49500000>;
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spi-cpol;
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spi-cpha;
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};
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};
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@ -238,7 +238,6 @@
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};
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service_msch: syscon@ffac0000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3368-msch", "syscon";
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reg = <0x0 0xffac0000 0x0 0x2000>;
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status = "okay";
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@ -658,7 +657,6 @@
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};
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pmugrf: syscon@ff738000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3368-pmugrf", "syscon";
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reg = <0x0 0xff738000 0x0 0x1000>;
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};
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@ -669,7 +667,6 @@
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};
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cru: clock-controller@ff760000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3368-cru";
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reg = <0x0 0xff760000 0x0 0x1000>;
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rockchip,grf = <&grf>;
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@ -678,7 +675,6 @@
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};
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grf: syscon@ff770000 {
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u-boot,dm-pre-reloc;
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compatible = "rockchip,rk3368-grf", "syscon";
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reg = <0x0 0xff770000 0x0 0x1000>;
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};
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@ -3,6 +3,26 @@ if ROCKCHIP_RK3368
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choice
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prompt "RK3368 board"
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config TARGET_LION_RK3368
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bool "Theobroma Systems RK3368-uQ7 (Lion) module"
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help
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The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm,
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MXM-230 connector) system-on-module designed by Theobroma
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Systems for industrial applications.
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It provides the following features:
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- 8x Cortex-A53 (in 2 clusters of 4 cores each)
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- (on-module) up to 4GB of DDR3 memory
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- (on-module) SPI-NOR flash
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- (on-module) eMMC
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- Gigabit Ethernet (with an on-module KSZ9031 PHY)
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- USB
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- HDMI
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- MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group)
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- various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...)
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- on-module STM32 providing CAN, RTC and fan-control
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- (optional on-module) EAL4+-certified security module
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config TARGET_SHEEP
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bool "Sheep board"
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help
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@ -25,6 +45,7 @@ endchoice
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config SYS_SOC
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default "rockchip"
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source "board/theobroma-systems/lion_rk3368/Kconfig"
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source "board/rockchip/sheep_rk3368/Kconfig"
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source "board/geekbuying/geekbox/Kconfig"
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source "board/rockchip/evb_px5/Kconfig"
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15
board/theobroma-systems/lion_rk3368/Kconfig
Normal file
15
board/theobroma-systems/lion_rk3368/Kconfig
Normal file
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@ -0,0 +1,15 @@
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if TARGET_LION_RK3368
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config SYS_BOARD
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default "lion_rk3368"
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config SYS_VENDOR
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default "theobroma-systems"
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config SYS_CONFIG_NAME
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default "lion_rk3368"
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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endif
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10
board/theobroma-systems/lion_rk3368/MAINTAINERS
Normal file
10
board/theobroma-systems/lion_rk3368/MAINTAINERS
Normal file
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@ -0,0 +1,10 @@
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LION-RK3368 (RK3368-uQ7 system-on-module)
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M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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M: Klaus Goger <klaus.goger@theobroma-systems.com>
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S: Maintained
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F: board/theobroma-systems/lion_rk3368
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F: include/configs/lion_rk3368.h
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F: arch/arm/dts/rk3368-lion.dts
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F: configs/lion-rk3368_defconfig
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W: https://www.theobroma-systems.com/rk3368-uq7/tech-specs
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T: git git://git.theobroma-systems.com/lion-u-boot.git
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7
board/theobroma-systems/lion_rk3368/Makefile
Normal file
7
board/theobroma-systems/lion_rk3368/Makefile
Normal file
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@ -0,0 +1,7 @@
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#
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# Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += lion_rk3368.o
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60
board/theobroma-systems/lion_rk3368/README
Normal file
60
board/theobroma-systems/lion_rk3368/README
Normal file
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@ -0,0 +1,60 @@
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Here is the step-by-step to boot to U-Boot on RK3368-uQ7
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Get the Source and build ATF
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============================
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> git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
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> cd arm-trusted-firmware
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> make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3368 bl31
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> cp build/rk3368/release/bl31.bin ../u-boot/bl31-rk3368.bin
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Configure U-Boot
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================
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> cd ../u-boot
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> make lion-rk3368_defconfig
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Build the TPL/SPL stage
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=======================
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> make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm
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> tools/mkimage -n rk3368 -T rksd -d tpl/u-boot-tpl.bin spl-3368.img
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> cat spl/u-boot-spl-dtb.bin >> spl-3368.img
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Build the full U-Boot and a FIT image including the ATF
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=======================================================
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> make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb
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Write to a SD-card
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==================
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> dd if=spl-3368.img of=/dev/sdb seek=64
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> dd if=u-boot.itb of=/dev/sdb seek=512
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If everything went according to plan, you should see the following
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output on UART0:
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<debug_uart> U-Boot TPL board init
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Trying to boot from BOOTROM
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Returning to boot ROM...
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Trying to boot from MMC1
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NOTICE: BL31: v1.3(release):v1.2-1320-gbf43a443
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NOTICE: BL31: Built : 18:04:47, Jul 5 2017
|
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|
||||
|
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U-Boot 2017.07-00158-g2395e99858 (Jul 18 2017 - 21:03:31 +0200)
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|
||||
Model: Theobroma Systems RK3368-uQ7 SoM
|
||||
DRAM: 2 GiB
|
||||
MMC: dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0
|
||||
Using default environment
|
||||
|
||||
In: serial@ff180000
|
||||
Out: serial@ff180000
|
||||
Err: serial@ff180000
|
||||
Net:
|
||||
Warning: ethernet@ff290000 (eth0) using random MAC address - d2:69:35:7e:d0:1e
|
||||
eth0: ethernet@ff290000
|
||||
Hit any key to stop autoboot: 2
|
||||
51
board/theobroma-systems/lion_rk3368/fit_spl_atf.its
Normal file
51
board/theobroma-systems/lion_rk3368/fit_spl_atf.its
Normal file
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
|
||||
*
|
||||
* Minimal dts for a SPL FIT image payload.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+ X11
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
description = "FIT image with U-Boot proper, ATF bl31, DTB";
|
||||
#address-cells = <1>;
|
||||
|
||||
images {
|
||||
uboot {
|
||||
description = "U-Boot (64-bit)";
|
||||
data = /incbin/("../../../u-boot-nodtb.bin");
|
||||
type = "standalone";
|
||||
arch = "arm64";
|
||||
compression = "none";
|
||||
load = <0x00200000>;
|
||||
};
|
||||
atf {
|
||||
description = "ARM Trusted Firmware";
|
||||
data = /incbin/("../../../bl31-rk3368.bin");
|
||||
type = "firmware";
|
||||
arch = "arm64";
|
||||
compression = "none";
|
||||
load = <0x00010000>;
|
||||
entry = <0x00010000>;
|
||||
};
|
||||
|
||||
fdt {
|
||||
description = "RK3368-uQ7 (Lion) flat device-tree";
|
||||
data = /incbin/("../../../u-boot.dtb");
|
||||
type = "flat_dt";
|
||||
compression = "none";
|
||||
};
|
||||
};
|
||||
|
||||
configurations {
|
||||
default = "conf";
|
||||
conf {
|
||||
description = "Theobroma Systems RK3368-uQ7 (Puma) SoM";
|
||||
firmware = "uboot";
|
||||
loadables = "atf";
|
||||
fdt = "fdt";
|
||||
};
|
||||
};
|
||||
};
|
||||
25
board/theobroma-systems/lion_rk3368/lion_rk3368.c
Normal file
25
board/theobroma-systems/lion_rk3368/lion_rk3368.c
Normal file
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <ram.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/grf_rk3368.h>
|
||||
#include <asm/arch/timer.h>
|
||||
#include <syscon.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int mach_cpu_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
92
configs/lion-rk3368_defconfig
Normal file
92
configs/lion-rk3368_defconfig
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ROCKCHIP_RK3368=y
|
||||
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
|
||||
CONFIG_TPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_TPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x600000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion"
|
||||
CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_FIT=y
|
||||
CONFIG_FIT_VERBOSE=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_ARCH_EARLY_INIT_R=y
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
|
||||
CONFIG_SPL_BOOTROM_SUPPORT=y
|
||||
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
|
||||
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
|
||||
CONFIG_SPL_ATF_SUPPORT=y
|
||||
CONFIG_SPL_ATF_TEXT_BASE=0x10000
|
||||
CONFIG_TPL=y
|
||||
CONFIG_TPL_BOOTROM_SUPPORT=y
|
||||
CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_FASTBOOT=y
|
||||
CONFIG_ANDROID_BOOT_IMAGE=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_MTDPARTS=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_TPL_OF_CONTROL=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
|
||||
CONFIG_TPL_OF_PLATDATA=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_TPL_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_TPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_TPL_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_TPL_CLK=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_PHY_MICREL=y
|
||||
CONFIG_PHY_MICREL_KSZ9031=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_ETH_DESIGNWARE=y
|
||||
CONFIG_RGMII=y
|
||||
CONFIG_GMAC_ROCKCHIP=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
CONFIG_PINCTRL_ROCKCHIP_RK3368=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_RK8XX=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_TPL_RAM=y
|
||||
CONFIG_DEBUG_UART_BASE=0xFF180000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_DEBUG_UART_ANNOUNCE=y
|
||||
CONFIG_DEBUG_UART_SKIP_INIT=y
|
||||
CONFIG_ROCKCHIP_SPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_LZO=y
|
||||
CONFIG_ERRNO_STR=y
|
||||
CONFIG_SMBIOS_MANUFACTURER="rockchip"
|
||||
18
include/configs/lion_rk3368.h
Normal file
18
include/configs/lion_rk3368.h
Normal file
|
|
@ -0,0 +1,18 @@
|
|||
/*
|
||||
* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIGS_LION_RK3368_H
|
||||
#define __CONFIGS_LION_RK3368_H
|
||||
|
||||
#include <configs/rk3368_common.h>
|
||||
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
#define KERNEL_LOAD_ADDR 0x280000
|
||||
#define DTB_LOAD_ADDR 0x5600000
|
||||
#define INITRD_LOAD_ADDR 0x5bf0000
|
||||
#define CONFIG_ENV_SIZE 0x2000
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Reference in a new issue