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sun8i_emac: configure PHY reset GPIO via DM
This ports the support for configuring a GPIO for resetting the Ethernet PHY (incl. such details as the reset polarity and pulse-length) from the Designware driver. X-AffectedPlatforms: A64-uQ7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Philipp Tomsich
Jagan Teki
parent
d53ecad92f
commit
4d555ae3f5
1 changed files with 80 additions and 6 deletions
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@ -21,6 +21,9 @@
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#include <malloc.h>
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#include <miiphy.h>
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#include <net.h>
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#ifdef CONFIG_DM_GPIO
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#include <asm-generic/gpio.h>
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#endif
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#define MDIO_CMD_MII_BUSY BIT(0)
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#define MDIO_CMD_MII_WRITE BIT(1)
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@ -128,11 +131,22 @@ struct emac_eth_dev {
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phys_addr_t sysctl_reg;
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struct phy_device *phydev;
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struct mii_dev *bus;
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#ifdef CONFIG_DM_GPIO
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struct gpio_desc reset_gpio;
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#endif
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};
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struct sun8i_eth_pdata {
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struct eth_pdata eth_pdata;
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u32 reset_delays[3];
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};
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static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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{
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struct emac_eth_dev *priv = bus->priv;
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struct udevice *dev = bus->priv;
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struct emac_eth_dev *priv = dev_get_priv(dev);
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ulong start;
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u32 miiaddr = 0;
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int timeout = CONFIG_MDIO_TIMEOUT;
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@ -164,7 +178,8 @@ static int sun8i_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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u16 val)
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{
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struct emac_eth_dev *priv = bus->priv;
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struct udevice *dev = bus->priv;
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struct emac_eth_dev *priv = dev_get_priv(dev);
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ulong start;
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u32 miiaddr = 0;
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int ret = -1, timeout = CONFIG_MDIO_TIMEOUT;
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@ -604,7 +619,41 @@ static void sun8i_emac_board_setup(struct emac_eth_dev *priv)
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setbits_le32(&ccm->ahb_reset0_cfg, BIT(AHB_RESET_OFFSET_GMAC));
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}
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static int sun8i_mdio_init(const char *name, struct emac_eth_dev *priv)
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#if defined(CONFIG_DM_GPIO)
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static int sun8i_mdio_reset(struct mii_dev *bus)
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{
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struct udevice *dev = bus->priv;
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struct emac_eth_dev *priv = dev_get_priv(dev);
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struct sun8i_eth_pdata *pdata = dev_get_platdata(dev);
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int ret;
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if (!dm_gpio_is_valid(&priv->reset_gpio))
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return 0;
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/* reset the phy */
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ret = dm_gpio_set_value(&priv->reset_gpio, 0);
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if (ret)
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return ret;
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udelay(pdata->reset_delays[0]);
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ret = dm_gpio_set_value(&priv->reset_gpio, 1);
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if (ret)
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return ret;
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udelay(pdata->reset_delays[1]);
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ret = dm_gpio_set_value(&priv->reset_gpio, 0);
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if (ret)
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return ret;
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udelay(pdata->reset_delays[2]);
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return 0;
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}
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#endif
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static int sun8i_mdio_init(const char *name, struct udevice *priv)
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{
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struct mii_dev *bus = mdio_alloc();
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@ -617,6 +666,9 @@ static int sun8i_mdio_init(const char *name, struct emac_eth_dev *priv)
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bus->write = sun8i_mdio_write;
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snprintf(bus->name, sizeof(bus->name), name);
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bus->priv = (void *)priv;
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#if defined(CONFIG_DM_GPIO)
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bus->reset = sun8i_mdio_reset;
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#endif
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return mdio_register(bus);
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}
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@ -696,7 +748,7 @@ static int sun8i_emac_eth_probe(struct udevice *dev)
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sun8i_emac_board_setup(priv);
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sun8i_emac_set_syscon(priv);
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sun8i_mdio_init(dev->name, priv);
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sun8i_mdio_init(dev->name, dev);
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priv->bus = miiphy_get_dev_by_name(dev->name);
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return sun8i_phy_init(priv, dev);
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@ -713,11 +765,16 @@ static const struct eth_ops sun8i_emac_eth_ops = {
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static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
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{
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struct eth_pdata *pdata = dev_get_platdata(dev);
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struct sun8i_eth_pdata *sun8i_pdata = dev_get_platdata(dev);
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struct eth_pdata *pdata = &sun8i_pdata->eth_pdata;
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struct emac_eth_dev *priv = dev_get_priv(dev);
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const char *phy_mode;
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int node = dev_of_offset(dev);
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int offset = 0;
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#ifdef CONFIG_DM_GPIO
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int reset_flags = GPIOD_IS_OUT;
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int ret = 0;
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#endif
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pdata->iobase = dev_get_addr_name(dev, "emac");
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priv->sysctl_reg = dev_get_addr_name(dev, "syscon");
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@ -762,6 +819,23 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev)
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if (!priv->use_internal_phy)
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parse_phy_pins(dev);
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#ifdef CONFIG_DM_GPIO
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if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset,
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"snps,reset-active-low"))
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reset_flags |= GPIOD_ACTIVE_LOW;
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ret = gpio_request_by_name(dev, "snps,reset-gpio", 0,
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&priv->reset_gpio, reset_flags);
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if (ret == 0) {
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ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
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"snps,reset-delays-us",
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sun8i_pdata->reset_delays, 3);
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} else if (ret == -ENOENT) {
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ret = 0;
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}
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#endif
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return 0;
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}
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@ -782,6 +856,6 @@ U_BOOT_DRIVER(eth_sun8i_emac) = {
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.probe = sun8i_emac_eth_probe,
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.ops = &sun8i_emac_eth_ops,
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.priv_auto_alloc_size = sizeof(struct emac_eth_dev),
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.platdata_auto_alloc_size = sizeof(struct eth_pdata),
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.platdata_auto_alloc_size = sizeof(struct sun8i_eth_pdata),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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